xref: /openbmc/u-boot/arch/nds32/cpu/n1213/ag101/cpu.c (revision 85231c08)
1 /*
2  * (C) Copyright 2002
3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4  * Marius Groeger <mgroeger@sysgo.de>
5  *
6  * (C) Copyright 2002
7  * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
8  *
9  * Copyright (C) 2011 Andes Technology Corporation
10  * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
11  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
12  *
13  * SPDX-License-Identifier:	GPL-2.0+
14  */
15 
16 /* CPU specific code */
17 #include <common.h>
18 #include <command.h>
19 #include <watchdog.h>
20 #include <asm/cache.h>
21 
22 #include <faraday/ftwdt010_wdt.h>
23 
24 /*
25  * cleanup_before_linux() is called just before we call linux
26  * it prepares the processor for linux
27  *
28  * we disable interrupt and caches.
29  */
30 int cleanup_before_linux(void)
31 {
32 	disable_interrupts();
33 
34 	/* turn off I/D-cache */
35 	cache_flush();
36 	icache_disable();
37 	dcache_disable();
38 	return 0;
39 }
40 
41 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
42 {
43 	disable_interrupts();
44 
45 	/*
46 	 * reset to the base addr of andesboot.
47 	 * currently no ROM loader at addr 0.
48 	 * do not use reset_cpu(0);
49 	 */
50 #ifdef CONFIG_FTWDT010_WATCHDOG
51 	/*
52 	 * workaround: if we use CONFIG_HW_WATCHDOG with ftwdt010, will lead
53 	 * automatic hardware reset when booting Linux.
54 	 * Please do not use CONFIG_HW_WATCHDOG and WATCHDOG_RESET() here.
55 	 */
56 	ftwdt010_wdt_reset();
57 	while (1)
58 		;
59 #endif /* CONFIG_FTWDT010_WATCHDOG */
60 
61 	/*NOTREACHED*/
62 }
63