1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2018 Stefan Roese <sr@denx.de> 4 */ 5 6 #include <common.h> 7 #include <dm.h> 8 #include <ram.h> 9 #include <wdt.h> 10 #include <asm/io.h> 11 #include <linux/io.h> 12 #include <linux/sizes.h> 13 #include "mt76xx.h" 14 15 #define STR_LEN 6 16 17 #ifdef CONFIG_BOOT_ROM 18 int mach_cpu_init(void) 19 { 20 ddr_calibrate(); 21 22 return 0; 23 } 24 #endif 25 26 int dram_init(void) 27 { 28 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, SZ_256M); 29 30 return 0; 31 } 32 33 int print_cpuinfo(void) 34 { 35 static const char * const boot_str[] = { "PLL (3-Byte SPI Addr)", 36 "PLL (4-Byte SPI Addr)", 37 "XTAL (3-Byte SPI Addr)", 38 "XTAL (4-Byte SPI Addr)" }; 39 const void *blob = gd->fdt_blob; 40 void __iomem *sysc_base; 41 char buf[STR_LEN + 1]; 42 fdt_addr_t base; 43 fdt_size_t size; 44 char *str; 45 int node; 46 u32 val; 47 48 /* Get system controller base address */ 49 node = fdt_node_offset_by_compatible(blob, -1, "ralink,mt7620a-sysc"); 50 if (node < 0) 51 return -FDT_ERR_NOTFOUND; 52 53 base = fdtdec_get_addr_size_auto_noparent(blob, node, "reg", 54 0, &size, true); 55 if (base == FDT_ADDR_T_NONE) 56 return -EINVAL; 57 58 sysc_base = ioremap_nocache(base, size); 59 60 str = (char *)sysc_base + MT76XX_CHIPID_OFFS; 61 snprintf(buf, STR_LEN + 1, "%s", str); 62 val = readl(sysc_base + MT76XX_CHIP_REV_ID_OFFS); 63 printf("CPU: %-*s Rev %ld.%ld - ", STR_LEN, buf, 64 (val & GENMASK(11, 8)) >> 8, val & GENMASK(3, 0)); 65 66 val = (readl(sysc_base + MT76XX_SYSCFG0_OFFS) & GENMASK(3, 1)) >> 1; 67 printf("Boot from %s\n", boot_str[val]); 68 69 return 0; 70 } 71 72 #ifdef CONFIG_WATCHDOG 73 static struct udevice *watchdog_dev; 74 75 /* Called by macro WATCHDOG_RESET */ 76 void watchdog_reset(void) 77 { 78 static ulong next_reset; 79 ulong now; 80 81 if (!watchdog_dev) 82 return; 83 84 now = get_timer(0); 85 86 /* Do not reset the watchdog too often */ 87 if (now > next_reset) { 88 next_reset = now + 1000; /* reset every 1000ms */ 89 wdt_reset(watchdog_dev); 90 } 91 } 92 #endif 93 94 int arch_misc_init(void) 95 { 96 /* 97 * It has been noticed, that sometimes the d-cache is not in a 98 * "clean-state" when U-Boot is running on MT7688. This was 99 * detected when using the ethernet driver (which uses d-cache) 100 * and a TFTP command does not complete. Flushing the complete 101 * d-cache (again?) here seems to fix this issue. 102 */ 103 flush_dcache_range(gd->bd->bi_memstart, 104 gd->bd->bi_memstart + gd->ram_size - 1); 105 106 #ifdef CONFIG_WATCHDOG 107 /* Init watchdog */ 108 if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) { 109 debug("Watchdog: Not found by seq!\n"); 110 if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { 111 puts("Watchdog: Not found!\n"); 112 return 0; 113 } 114 } 115 116 wdt_start(watchdog_dev, 60000, 0); /* 60 seconds */ 117 printf("Watchdog: Started\n"); 118 #endif 119 120 return 0; 121 } 122