1*4c835a60SStefan Roesemenu "MediaTek MIPS platforms" 2*4c835a60SStefan Roese depends on ARCH_MT7620 3*4c835a60SStefan Roese 4*4c835a60SStefan Roeseconfig SYS_MALLOC_F_LEN 5*4c835a60SStefan Roese default 0x1000 6*4c835a60SStefan Roese 7*4c835a60SStefan Roeseconfig SYS_SOC 8*4c835a60SStefan Roese default "mt7620" if SOC_MT7620 9*4c835a60SStefan Roese 10*4c835a60SStefan Roesechoice 11*4c835a60SStefan Roese prompt "MediaTek MIPS SoC select" 12*4c835a60SStefan Roese 13*4c835a60SStefan Roeseconfig SOC_MT7620 14*4c835a60SStefan Roese bool "MT7620/8" 15*4c835a60SStefan Roese select MIPS_L1_CACHE_SHIFT_5 16*4c835a60SStefan Roese help 17*4c835a60SStefan Roese This supports MediaTek MIPS MT7620 family. 18*4c835a60SStefan Roese 19*4c835a60SStefan Roeseendchoice 20*4c835a60SStefan Roese 21*4c835a60SStefan Roesechoice 22*4c835a60SStefan Roese prompt "Board select" 23*4c835a60SStefan Roese 24*4c835a60SStefan Roeseendchoice 25*4c835a60SStefan Roese 26*4c835a60SStefan Roesechoice 27*4c835a60SStefan Roese prompt "Boot mode" 28*4c835a60SStefan Roese 29*4c835a60SStefan Roeseconfig BOOT_RAM 30*4c835a60SStefan Roese bool "RAM boot" 31*4c835a60SStefan Roese depends on SUPPORTS_BOOT_RAM 32*4c835a60SStefan Roese help 33*4c835a60SStefan Roese This builds an image that is linked to a RAM address. It can be used 34*4c835a60SStefan Roese for booting from CFE via TFTP using an ELF image, but it can also be 35*4c835a60SStefan Roese booted from RAM by other bootloaders using a BIN image. 36*4c835a60SStefan Roese 37*4c835a60SStefan Roeseconfig BOOT_ROM 38*4c835a60SStefan Roese bool "ROM boot" 39*4c835a60SStefan Roese depends on SUPPORTS_BOOT_RAM 40*4c835a60SStefan Roese help 41*4c835a60SStefan Roese This builds an image that is linked to a ROM address. It can be 42*4c835a60SStefan Roese used as main bootloader image which is programmed onto the onboard 43*4c835a60SStefan Roese flash storage (SPI NOR). 44*4c835a60SStefan Roese 45*4c835a60SStefan Roeseendchoice 46*4c835a60SStefan Roese 47*4c835a60SStefan Roesechoice 48*4c835a60SStefan Roese prompt "DDR2 size" 49*4c835a60SStefan Roese 50*4c835a60SStefan Roeseconfig ONBOARD_DDR2_SIZE_256MBIT 51*4c835a60SStefan Roese bool "256MBit (32MByte) total size" 52*4c835a60SStefan Roese depends on BOOT_ROM 53*4c835a60SStefan Roese help 54*4c835a60SStefan Roese Use 256MBit (32MByte) of DDR total size 55*4c835a60SStefan Roese 56*4c835a60SStefan Roeseconfig ONBOARD_DDR2_SIZE_512MBIT 57*4c835a60SStefan Roese bool "512MBit (64MByte) total size" 58*4c835a60SStefan Roese depends on BOOT_ROM 59*4c835a60SStefan Roese help 60*4c835a60SStefan Roese Use 512MBit (64MByte) of DDR total size 61*4c835a60SStefan Roese 62*4c835a60SStefan Roeseconfig ONBOARD_DDR2_SIZE_1024MBIT 63*4c835a60SStefan Roese bool "1024MBit (128MByte) total size" 64*4c835a60SStefan Roese depends on BOOT_ROM 65*4c835a60SStefan Roese help 66*4c835a60SStefan Roese Use 1024MBit (128MByte) of DDR total size 67*4c835a60SStefan Roese 68*4c835a60SStefan Roeseconfig ONBOARD_DDR2_SIZE_2048MBIT 69*4c835a60SStefan Roese bool "2048MBit (256MByte) total size" 70*4c835a60SStefan Roese depends on BOOT_ROM 71*4c835a60SStefan Roese help 72*4c835a60SStefan Roese Use 2048MBit (256MByte) of DDR total size 73*4c835a60SStefan Roese 74*4c835a60SStefan Roeseendchoice 75*4c835a60SStefan Roese 76*4c835a60SStefan Roesechoice 77*4c835a60SStefan Roese prompt "DDR2 chip width" 78*4c835a60SStefan Roese 79*4c835a60SStefan Roeseconfig ONBOARD_DDR2_CHIP_WIDTH_8BIT 80*4c835a60SStefan Roese bool "8bit DDR chip width" 81*4c835a60SStefan Roese depends on BOOT_ROM 82*4c835a60SStefan Roese help 83*4c835a60SStefan Roese Use DDR chips with 8bit width 84*4c835a60SStefan Roese 85*4c835a60SStefan Roeseconfig ONBOARD_DDR2_CHIP_WIDTH_16BIT 86*4c835a60SStefan Roese bool "16bit DDR chip width" 87*4c835a60SStefan Roese depends on BOOT_ROM 88*4c835a60SStefan Roese help 89*4c835a60SStefan Roese Use DDR chips with 16bit width 90*4c835a60SStefan Roese 91*4c835a60SStefan Roeseendchoice 92*4c835a60SStefan Roese 93*4c835a60SStefan Roesechoice 94*4c835a60SStefan Roese prompt "DDR2 bus width" 95*4c835a60SStefan Roese 96*4c835a60SStefan Roeseconfig ONBOARD_DDR2_BUS_WIDTH_16BIT 97*4c835a60SStefan Roese bool "16bit DDR bus width" 98*4c835a60SStefan Roese depends on BOOT_ROM 99*4c835a60SStefan Roese help 100*4c835a60SStefan Roese Use 16bit DDR bus width 101*4c835a60SStefan Roese 102*4c835a60SStefan Roeseconfig ONBOARD_DDR2_BUS_WIDTH_32BIT 103*4c835a60SStefan Roese bool "32bit DDR bus width" 104*4c835a60SStefan Roese depends on BOOT_ROM 105*4c835a60SStefan Roese help 106*4c835a60SStefan Roese Use 32bit DDR bus width 107*4c835a60SStefan Roese 108*4c835a60SStefan Roeseendchoice 109*4c835a60SStefan Roese 110*4c835a60SStefan Roeseconfig SUPPORTS_BOOT_RAM 111*4c835a60SStefan Roese bool 112*4c835a60SStefan Roese 113*4c835a60SStefan Roeseendmenu 114