14c835a60SStefan Roesemenu "MediaTek MIPS platforms" 24c835a60SStefan Roese depends on ARCH_MT7620 34c835a60SStefan Roese 44c835a60SStefan Roeseconfig SYS_MALLOC_F_LEN 54c835a60SStefan Roese default 0x1000 64c835a60SStefan Roese 74c835a60SStefan Roeseconfig SYS_SOC 84c835a60SStefan Roese default "mt7620" if SOC_MT7620 94c835a60SStefan Roese 104c835a60SStefan Roesechoice 114c835a60SStefan Roese prompt "MediaTek MIPS SoC select" 124c835a60SStefan Roese 134c835a60SStefan Roeseconfig SOC_MT7620 144c835a60SStefan Roese bool "MT7620/8" 154c835a60SStefan Roese select MIPS_L1_CACHE_SHIFT_5 164c835a60SStefan Roese help 174c835a60SStefan Roese This supports MediaTek MIPS MT7620 family. 184c835a60SStefan Roese 194c835a60SStefan Roeseendchoice 204c835a60SStefan Roese 214c835a60SStefan Roesechoice 224c835a60SStefan Roese prompt "Board select" 234c835a60SStefan Roese 2488dc4099SStefan Roeseconfig BOARD_GARDENA_SMART_GATEWAY_MT7688 2588dc4099SStefan Roese bool "Gardena Smart Gateway" 2688dc4099SStefan Roese depends on SOC_MT7620 27*b1f51fc2SStefan Roese select BOARD_LATE_INIT 2888dc4099SStefan Roese select SUPPORTS_BOOT_RAM 2988dc4099SStefan Roese help 3088dc4099SStefan Roese Gardena Smart Gateway boards have a MT7688 SoC with 128 MiB of RAM 3188dc4099SStefan Roese and 8 MiB of flash (SPI NOR) and additional SPI NAND storage. 3288dc4099SStefan Roese 33b02f76a8SStefan Roeseconfig BOARD_LINKIT_SMART_7688 34b02f76a8SStefan Roese bool "LinkIt Smart 7688" 35b02f76a8SStefan Roese depends on SOC_MT7620 36b02f76a8SStefan Roese select SUPPORTS_BOOT_RAM 37b02f76a8SStefan Roese help 38b02f76a8SStefan Roese Seeed LinkIt Smart 7688 boards have a MT7688 SoC with 128 MiB of RAM 39b02f76a8SStefan Roese and 32 MiB of flash (SPI). 40b02f76a8SStefan Roese Between its different peripherals there's an integrated switch with 4 41b02f76a8SStefan Roese ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and 42b02f76a8SStefan Roese a MT7688 (PCIe). 43b02f76a8SStefan Roese 444c835a60SStefan Roeseendchoice 454c835a60SStefan Roese 464c835a60SStefan Roesechoice 474c835a60SStefan Roese prompt "Boot mode" 484c835a60SStefan Roese 494c835a60SStefan Roeseconfig BOOT_RAM 504c835a60SStefan Roese bool "RAM boot" 514c835a60SStefan Roese depends on SUPPORTS_BOOT_RAM 524c835a60SStefan Roese help 534c835a60SStefan Roese This builds an image that is linked to a RAM address. It can be used 544c835a60SStefan Roese for booting from CFE via TFTP using an ELF image, but it can also be 554c835a60SStefan Roese booted from RAM by other bootloaders using a BIN image. 564c835a60SStefan Roese 574c835a60SStefan Roeseconfig BOOT_ROM 584c835a60SStefan Roese bool "ROM boot" 594c835a60SStefan Roese depends on SUPPORTS_BOOT_RAM 604c835a60SStefan Roese help 614c835a60SStefan Roese This builds an image that is linked to a ROM address. It can be 624c835a60SStefan Roese used as main bootloader image which is programmed onto the onboard 634c835a60SStefan Roese flash storage (SPI NOR). 644c835a60SStefan Roese 654c835a60SStefan Roeseendchoice 664c835a60SStefan Roese 674c835a60SStefan Roesechoice 684c835a60SStefan Roese prompt "DDR2 size" 694c835a60SStefan Roese 704c835a60SStefan Roeseconfig ONBOARD_DDR2_SIZE_256MBIT 714c835a60SStefan Roese bool "256MBit (32MByte) total size" 724c835a60SStefan Roese depends on BOOT_ROM 734c835a60SStefan Roese help 744c835a60SStefan Roese Use 256MBit (32MByte) of DDR total size 754c835a60SStefan Roese 764c835a60SStefan Roeseconfig ONBOARD_DDR2_SIZE_512MBIT 774c835a60SStefan Roese bool "512MBit (64MByte) total size" 784c835a60SStefan Roese depends on BOOT_ROM 794c835a60SStefan Roese help 804c835a60SStefan Roese Use 512MBit (64MByte) of DDR total size 814c835a60SStefan Roese 824c835a60SStefan Roeseconfig ONBOARD_DDR2_SIZE_1024MBIT 834c835a60SStefan Roese bool "1024MBit (128MByte) total size" 844c835a60SStefan Roese depends on BOOT_ROM 854c835a60SStefan Roese help 864c835a60SStefan Roese Use 1024MBit (128MByte) of DDR total size 874c835a60SStefan Roese 884c835a60SStefan Roeseconfig ONBOARD_DDR2_SIZE_2048MBIT 894c835a60SStefan Roese bool "2048MBit (256MByte) total size" 904c835a60SStefan Roese depends on BOOT_ROM 914c835a60SStefan Roese help 924c835a60SStefan Roese Use 2048MBit (256MByte) of DDR total size 934c835a60SStefan Roese 944c835a60SStefan Roeseendchoice 954c835a60SStefan Roese 964c835a60SStefan Roesechoice 974c835a60SStefan Roese prompt "DDR2 chip width" 984c835a60SStefan Roese 994c835a60SStefan Roeseconfig ONBOARD_DDR2_CHIP_WIDTH_8BIT 1004c835a60SStefan Roese bool "8bit DDR chip width" 1014c835a60SStefan Roese depends on BOOT_ROM 1024c835a60SStefan Roese help 1034c835a60SStefan Roese Use DDR chips with 8bit width 1044c835a60SStefan Roese 1054c835a60SStefan Roeseconfig ONBOARD_DDR2_CHIP_WIDTH_16BIT 1064c835a60SStefan Roese bool "16bit DDR chip width" 1074c835a60SStefan Roese depends on BOOT_ROM 1084c835a60SStefan Roese help 1094c835a60SStefan Roese Use DDR chips with 16bit width 1104c835a60SStefan Roese 1114c835a60SStefan Roeseendchoice 1124c835a60SStefan Roese 1134c835a60SStefan Roesechoice 1144c835a60SStefan Roese prompt "DDR2 bus width" 1154c835a60SStefan Roese 1164c835a60SStefan Roeseconfig ONBOARD_DDR2_BUS_WIDTH_16BIT 1174c835a60SStefan Roese bool "16bit DDR bus width" 1184c835a60SStefan Roese depends on BOOT_ROM 1194c835a60SStefan Roese help 1204c835a60SStefan Roese Use 16bit DDR bus width 1214c835a60SStefan Roese 1224c835a60SStefan Roeseconfig ONBOARD_DDR2_BUS_WIDTH_32BIT 1234c835a60SStefan Roese bool "32bit DDR bus width" 1244c835a60SStefan Roese depends on BOOT_ROM 1254c835a60SStefan Roese help 1264c835a60SStefan Roese Use 32bit DDR bus width 1274c835a60SStefan Roese 1284c835a60SStefan Roeseendchoice 1294c835a60SStefan Roese 1304c835a60SStefan Roeseconfig SUPPORTS_BOOT_RAM 1314c835a60SStefan Roese bool 1324c835a60SStefan Roese 13388dc4099SStefan Roesesource "board/gardena/smart-gateway-mt7688/Kconfig" 134b02f76a8SStefan Roesesource "board/seeed/linkit-smart-7688/Kconfig" 135b02f76a8SStefan Roese 1364c835a60SStefan Roeseendmenu 137