11d3d0f1fSWills Wang /* 21d3d0f1fSWills Wang * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com> 31d3d0f1fSWills Wang * 41d3d0f1fSWills Wang * SPDX-License-Identifier: GPL-2.0+ 51d3d0f1fSWills Wang */ 61d3d0f1fSWills Wang 71d3d0f1fSWills Wang #include <common.h> 81d3d0f1fSWills Wang #include <asm/io.h> 91d3d0f1fSWills Wang #include <asm/addrspace.h> 101d3d0f1fSWills Wang #include <asm/types.h> 111d3d0f1fSWills Wang #include <mach/ath79.h> 121d3d0f1fSWills Wang #include <mach/ar71xx_regs.h> 131d3d0f1fSWills Wang 141d3d0f1fSWills Wang void _machine_restart(void) 151d3d0f1fSWills Wang { 161d3d0f1fSWills Wang void __iomem *base; 171d3d0f1fSWills Wang u32 reg = 0; 181d3d0f1fSWills Wang 191d3d0f1fSWills Wang base = map_physmem(AR71XX_RESET_BASE, AR71XX_RESET_SIZE, 201d3d0f1fSWills Wang MAP_NOCACHE); 211d3d0f1fSWills Wang if (soc_is_ar71xx()) 221d3d0f1fSWills Wang reg = AR71XX_RESET_REG_RESET_MODULE; 231d3d0f1fSWills Wang else if (soc_is_ar724x()) 241d3d0f1fSWills Wang reg = AR724X_RESET_REG_RESET_MODULE; 251d3d0f1fSWills Wang else if (soc_is_ar913x()) 261d3d0f1fSWills Wang reg = AR913X_RESET_REG_RESET_MODULE; 271d3d0f1fSWills Wang else if (soc_is_ar933x()) 281d3d0f1fSWills Wang reg = AR933X_RESET_REG_RESET_MODULE; 291d3d0f1fSWills Wang else if (soc_is_ar934x()) 301d3d0f1fSWills Wang reg = AR934X_RESET_REG_RESET_MODULE; 311d3d0f1fSWills Wang else if (soc_is_qca953x()) 321d3d0f1fSWills Wang reg = QCA953X_RESET_REG_RESET_MODULE; 331d3d0f1fSWills Wang else if (soc_is_qca955x()) 341d3d0f1fSWills Wang reg = QCA955X_RESET_REG_RESET_MODULE; 351d3d0f1fSWills Wang else if (soc_is_qca956x()) 361d3d0f1fSWills Wang reg = QCA956X_RESET_REG_RESET_MODULE; 371d3d0f1fSWills Wang else 381d3d0f1fSWills Wang puts("Reset register not defined for this SOC\n"); 391d3d0f1fSWills Wang 401d3d0f1fSWills Wang if (reg) 411d3d0f1fSWills Wang setbits_be32(base + reg, AR71XX_RESET_FULL_CHIP); 421d3d0f1fSWills Wang 431d3d0f1fSWills Wang while (1) 441d3d0f1fSWills Wang /* NOP */; 451d3d0f1fSWills Wang } 461d3d0f1fSWills Wang 471d3d0f1fSWills Wang u32 get_bootstrap(void) 481d3d0f1fSWills Wang { 49*43a092ffSMarek Vasut void __iomem *base; 501d3d0f1fSWills Wang u32 reg = 0; 511d3d0f1fSWills Wang 521d3d0f1fSWills Wang base = map_physmem(AR71XX_RESET_BASE, AR71XX_RESET_SIZE, 531d3d0f1fSWills Wang MAP_NOCACHE); 541d3d0f1fSWills Wang if (soc_is_ar933x()) 551d3d0f1fSWills Wang reg = AR933X_RESET_REG_BOOTSTRAP; 561d3d0f1fSWills Wang else if (soc_is_ar934x()) 571d3d0f1fSWills Wang reg = AR934X_RESET_REG_BOOTSTRAP; 581d3d0f1fSWills Wang else if (soc_is_qca953x()) 591d3d0f1fSWills Wang reg = QCA953X_RESET_REG_BOOTSTRAP; 601d3d0f1fSWills Wang else if (soc_is_qca955x()) 611d3d0f1fSWills Wang reg = QCA955X_RESET_REG_BOOTSTRAP; 621d3d0f1fSWills Wang else if (soc_is_qca956x()) 631d3d0f1fSWills Wang reg = QCA956X_RESET_REG_BOOTSTRAP; 641d3d0f1fSWills Wang else 651d3d0f1fSWills Wang puts("Bootstrap register not defined for this SOC\n"); 661d3d0f1fSWills Wang 671d3d0f1fSWills Wang if (reg) 681d3d0f1fSWills Wang return readl(base + reg); 691d3d0f1fSWills Wang 701d3d0f1fSWills Wang return 0; 711d3d0f1fSWills Wang } 72