xref: /openbmc/u-boot/arch/mips/include/asm/processor.h (revision fc0db132)
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1994 Waldorf GMBH
7  * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
8  * Copyright (C) 1996 Paul M. Antoine
9  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
10  */
11 #ifndef _ASM_PROCESSOR_H
12 #define _ASM_PROCESSOR_H
13 
14 #include <linux/config.h>
15 
16 #include <asm/isadep.h>
17 
18 #include <asm/cachectl.h>
19 #include <asm/mipsregs.h>
20 #include <asm/reg.h>
21 #include <asm/system.h>
22 
23 /*
24  * Return current * instruction pointer ("program counter").
25  */
26 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
27 
28 /*
29  * System setup and hardware flags..
30  */
31 extern void (*cpu_wait)(void);
32 
33 extern unsigned int vced_count, vcei_count;
34 
35 #define NUM_FPU_REGS	32
36 
37 typedef __u64 fpureg_t;
38 
39 /*
40  * It would be nice to add some more fields for emulator statistics, but there
41  * are a number of fixed offsets in offset.h and elsewhere that would have to
42  * be recalculated by hand.  So the additional information will be private to
43  * the FPU emulator for now.  See asm-mips/fpu_emulator.h.
44  */
45 
46 struct mips_fpu_struct {
47 	fpureg_t	fpr[NUM_FPU_REGS];
48 	unsigned int	fcr31;
49 };
50 
51 #define NUM_DSP_REGS   6
52 
53 typedef __u32 dspreg_t;
54 
55 struct mips_dsp_state {
56 	dspreg_t        dspr[NUM_DSP_REGS];
57 	unsigned int    dspcontrol;
58 };
59 
60 typedef struct {
61 	unsigned long seg;
62 } mm_segment_t;
63 
64 #define ARCH_MIN_TASKALIGN	8
65 
66 struct mips_abi;
67 
68 /*
69  * If you change thread_struct remember to change the #defines below too!
70  */
71 struct thread_struct {
72 	/* Saved main processor registers. */
73 	unsigned long reg16;
74 	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
75 	unsigned long reg29, reg30, reg31;
76 
77 	/* Saved cp0 stuff. */
78 	unsigned long cp0_status;
79 
80 	/* Saved fpu/fpu emulator stuff. */
81 	struct mips_fpu_struct fpu;
82 #ifdef CONFIG_MIPS_MT_FPAFF
83 	/* Emulated instruction count */
84 	unsigned long emulated_fp;
85 	/* Saved per-thread scheduler affinity mask */
86 	cpumask_t user_cpus_allowed;
87 #endif /* CONFIG_MIPS_MT_FPAFF */
88 
89 	/* Saved state of the DSP ASE, if available. */
90 	struct mips_dsp_state dsp;
91 
92 	/* Other stuff associated with the thread. */
93 	unsigned long cp0_badvaddr;	/* Last user fault */
94 	unsigned long cp0_baduaddr;	/* Last kernel fault accessing USEG */
95 	unsigned long error_code;
96 	unsigned long trap_no;
97 	unsigned long irix_trampoline;  /* Wheee... */
98 	unsigned long irix_oldctx;
99 	struct mips_abi *abi;
100 };
101 
102 struct task_struct;
103 
104 /* Free all resources held by a thread. */
105 #define release_thread(thread) do { } while(0)
106 
107 /* Prepare to copy thread state - unlazy all lazy status */
108 #define prepare_to_copy(tsk)	do { } while (0)
109 
110 #define cpu_relax()	barrier()
111 
112 /*
113  * Return_address is a replacement for __builtin_return_address(count)
114  * which on certain architectures cannot reasonably be implemented in GCC
115  * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
116  * Note that __builtin_return_address(x>=1) is forbidden because GCC
117  * aborts compilation on some CPUs.  It's simply not possible to unwind
118  * some CPU's stackframes.
119  *
120  * __builtin_return_address works only for non-leaf functions.  We avoid the
121  * overhead of a function call by forcing the compiler to save the return
122  * address register on the stack.
123  */
124 #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
125 
126 #ifdef CONFIG_CPU_HAS_PREFETCH
127 
128 #define ARCH_HAS_PREFETCH
129 
130 static inline void prefetch(const void *addr)
131 {
132 	__asm__ __volatile__(
133 	"	.set	mips4		\n"
134 	"	pref	%0, (%1)	\n"
135 	"	.set	mips0		\n"
136 	:
137 	: "i" (Pref_Load), "r" (addr));
138 }
139 
140 #endif
141 
142 #endif /* _ASM_PROCESSOR_H */
143