1 /* 2 * Copyright (C) 1994 Waldorf GMBH 3 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle 4 * Copyright (C) 1996 Paul M. Antoine 5 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 6 * 7 * SPDX-License-Identifier: GPL-2.0 8 */ 9 #ifndef _ASM_PROCESSOR_H 10 #define _ASM_PROCESSOR_H 11 12 #include <asm/isadep.h> 13 14 #include <asm/cachectl.h> 15 #include <asm/mipsregs.h> 16 #include <asm/reg.h> 17 #include <asm/system.h> 18 19 /* 20 * Return current * instruction pointer ("program counter"). 21 */ 22 #define current_text_addr() ({ __label__ _l; _l: &&_l;}) 23 24 /* 25 * System setup and hardware flags.. 26 */ 27 extern void (*cpu_wait)(void); 28 29 extern unsigned int vced_count, vcei_count; 30 31 #define NUM_FPU_REGS 32 32 33 typedef __u64 fpureg_t; 34 35 /* 36 * It would be nice to add some more fields for emulator statistics, but there 37 * are a number of fixed offsets in offset.h and elsewhere that would have to 38 * be recalculated by hand. So the additional information will be private to 39 * the FPU emulator for now. See asm-mips/fpu_emulator.h. 40 */ 41 42 struct mips_fpu_struct { 43 fpureg_t fpr[NUM_FPU_REGS]; 44 unsigned int fcr31; 45 }; 46 47 #define NUM_DSP_REGS 6 48 49 typedef __u32 dspreg_t; 50 51 struct mips_dsp_state { 52 dspreg_t dspr[NUM_DSP_REGS]; 53 unsigned int dspcontrol; 54 }; 55 56 typedef struct { 57 unsigned long seg; 58 } mm_segment_t; 59 60 #define ARCH_MIN_TASKALIGN 8 61 62 struct mips_abi; 63 64 /* 65 * If you change thread_struct remember to change the #defines below too! 66 */ 67 struct thread_struct { 68 /* Saved main processor registers. */ 69 unsigned long reg16; 70 unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23; 71 unsigned long reg29, reg30, reg31; 72 73 /* Saved cp0 stuff. */ 74 unsigned long cp0_status; 75 76 /* Saved fpu/fpu emulator stuff. */ 77 struct mips_fpu_struct fpu; 78 #ifdef CONFIG_MIPS_MT_FPAFF 79 /* Emulated instruction count */ 80 unsigned long emulated_fp; 81 /* Saved per-thread scheduler affinity mask */ 82 cpumask_t user_cpus_allowed; 83 #endif /* CONFIG_MIPS_MT_FPAFF */ 84 85 /* Saved state of the DSP ASE, if available. */ 86 struct mips_dsp_state dsp; 87 88 /* Other stuff associated with the thread. */ 89 unsigned long cp0_badvaddr; /* Last user fault */ 90 unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */ 91 unsigned long error_code; 92 unsigned long trap_no; 93 unsigned long irix_trampoline; /* Wheee... */ 94 unsigned long irix_oldctx; 95 struct mips_abi *abi; 96 }; 97 98 struct task_struct; 99 100 /* Free all resources held by a thread. */ 101 #define release_thread(thread) do { } while(0) 102 103 /* Prepare to copy thread state - unlazy all lazy status */ 104 #define prepare_to_copy(tsk) do { } while (0) 105 106 #define cpu_relax() barrier() 107 108 /* 109 * Return_address is a replacement for __builtin_return_address(count) 110 * which on certain architectures cannot reasonably be implemented in GCC 111 * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386). 112 * Note that __builtin_return_address(x>=1) is forbidden because GCC 113 * aborts compilation on some CPUs. It's simply not possible to unwind 114 * some CPU's stackframes. 115 * 116 * __builtin_return_address works only for non-leaf functions. We avoid the 117 * overhead of a function call by forcing the compiler to save the return 118 * address register on the stack. 119 */ 120 #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);}) 121 122 #ifdef CONFIG_CPU_HAS_PREFETCH 123 124 #define ARCH_HAS_PREFETCH 125 126 static inline void prefetch(const void *addr) 127 { 128 __asm__ __volatile__( 129 " .set mips4 \n" 130 " pref %0, (%1) \n" 131 " .set mips0 \n" 132 : 133 : "i" (Pref_Load), "r" (addr)); 134 } 135 136 #endif 137 138 #endif /* _ASM_PROCESSOR_H */ 139