1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994 Waldorf GMBH 7 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle 8 * Copyright (C) 1996 Paul M. Antoine 9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 10 */ 11 #ifndef _ASM_PROCESSOR_H 12 #define _ASM_PROCESSOR_H 13 14 #include <asm/isadep.h> 15 16 #include <asm/cachectl.h> 17 #include <asm/mipsregs.h> 18 #include <asm/reg.h> 19 #include <asm/system.h> 20 21 /* 22 * Return current * instruction pointer ("program counter"). 23 */ 24 #define current_text_addr() ({ __label__ _l; _l: &&_l;}) 25 26 /* 27 * System setup and hardware flags.. 28 */ 29 extern void (*cpu_wait)(void); 30 31 extern unsigned int vced_count, vcei_count; 32 33 #define NUM_FPU_REGS 32 34 35 typedef __u64 fpureg_t; 36 37 /* 38 * It would be nice to add some more fields for emulator statistics, but there 39 * are a number of fixed offsets in offset.h and elsewhere that would have to 40 * be recalculated by hand. So the additional information will be private to 41 * the FPU emulator for now. See asm-mips/fpu_emulator.h. 42 */ 43 44 struct mips_fpu_struct { 45 fpureg_t fpr[NUM_FPU_REGS]; 46 unsigned int fcr31; 47 }; 48 49 #define NUM_DSP_REGS 6 50 51 typedef __u32 dspreg_t; 52 53 struct mips_dsp_state { 54 dspreg_t dspr[NUM_DSP_REGS]; 55 unsigned int dspcontrol; 56 }; 57 58 typedef struct { 59 unsigned long seg; 60 } mm_segment_t; 61 62 #define ARCH_MIN_TASKALIGN 8 63 64 struct mips_abi; 65 66 /* 67 * If you change thread_struct remember to change the #defines below too! 68 */ 69 struct thread_struct { 70 /* Saved main processor registers. */ 71 unsigned long reg16; 72 unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23; 73 unsigned long reg29, reg30, reg31; 74 75 /* Saved cp0 stuff. */ 76 unsigned long cp0_status; 77 78 /* Saved fpu/fpu emulator stuff. */ 79 struct mips_fpu_struct fpu; 80 #ifdef CONFIG_MIPS_MT_FPAFF 81 /* Emulated instruction count */ 82 unsigned long emulated_fp; 83 /* Saved per-thread scheduler affinity mask */ 84 cpumask_t user_cpus_allowed; 85 #endif /* CONFIG_MIPS_MT_FPAFF */ 86 87 /* Saved state of the DSP ASE, if available. */ 88 struct mips_dsp_state dsp; 89 90 /* Other stuff associated with the thread. */ 91 unsigned long cp0_badvaddr; /* Last user fault */ 92 unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */ 93 unsigned long error_code; 94 unsigned long trap_no; 95 unsigned long irix_trampoline; /* Wheee... */ 96 unsigned long irix_oldctx; 97 struct mips_abi *abi; 98 }; 99 100 struct task_struct; 101 102 /* Free all resources held by a thread. */ 103 #define release_thread(thread) do { } while(0) 104 105 /* Prepare to copy thread state - unlazy all lazy status */ 106 #define prepare_to_copy(tsk) do { } while (0) 107 108 #define cpu_relax() barrier() 109 110 /* 111 * Return_address is a replacement for __builtin_return_address(count) 112 * which on certain architectures cannot reasonably be implemented in GCC 113 * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386). 114 * Note that __builtin_return_address(x>=1) is forbidden because GCC 115 * aborts compilation on some CPUs. It's simply not possible to unwind 116 * some CPU's stackframes. 117 * 118 * __builtin_return_address works only for non-leaf functions. We avoid the 119 * overhead of a function call by forcing the compiler to save the return 120 * address register on the stack. 121 */ 122 #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);}) 123 124 #ifdef CONFIG_CPU_HAS_PREFETCH 125 126 #define ARCH_HAS_PREFETCH 127 128 static inline void prefetch(const void *addr) 129 { 130 __asm__ __volatile__( 131 " .set mips4 \n" 132 " pref %0, (%1) \n" 133 " .set mips0 \n" 134 : 135 : "i" (Pref_Load), "r" (addr)); 136 } 137 138 #endif 139 140 #endif /* _ASM_PROCESSOR_H */ 141