1 /* 2 * Cache operations for the cache instruction. 3 * 4 * This file is subject to the terms and conditions of the GNU General Public 5 * License. See the file "COPYING" in the main directory of this archive 6 * for more details. 7 * 8 * (C) Copyright 1996, 97, 99, 2002, 03 Ralf Baechle 9 * (C) Copyright 1999 Silicon Graphics, Inc. 10 */ 11 #ifndef __ASM_CACHEOPS_H 12 #define __ASM_CACHEOPS_H 13 14 /* 15 * Cache Operations available on all MIPS processors with R4000-style caches 16 */ 17 #define INDEX_INVALIDATE_I 0x00 18 #define INDEX_WRITEBACK_INV_D 0x01 19 #define INDEX_LOAD_TAG_I 0x04 20 #define INDEX_LOAD_TAG_D 0x05 21 #define INDEX_STORE_TAG_I 0x08 22 #define INDEX_STORE_TAG_D 0x09 23 #if defined(CONFIG_CPU_LOONGSON2) 24 #define HIT_INVALIDATE_I 0x00 25 #else 26 #define HIT_INVALIDATE_I 0x10 27 #endif 28 #define HIT_INVALIDATE_D 0x11 29 #define HIT_WRITEBACK_INV_D 0x15 30 31 /* 32 * R4000-specific cacheops 33 */ 34 #define CREATE_DIRTY_EXCL_D 0x0d 35 #define FILL 0x14 36 #define HIT_WRITEBACK_I 0x18 37 #define HIT_WRITEBACK_D 0x19 38 39 /* 40 * R4000SC and R4400SC-specific cacheops 41 */ 42 #define INDEX_INVALIDATE_SI 0x02 43 #define INDEX_WRITEBACK_INV_SD 0x03 44 #define INDEX_LOAD_TAG_SI 0x06 45 #define INDEX_LOAD_TAG_SD 0x07 46 #define INDEX_STORE_TAG_SI 0x0A 47 #define INDEX_STORE_TAG_SD 0x0B 48 #define CREATE_DIRTY_EXCL_SD 0x0f 49 #define HIT_INVALIDATE_SI 0x12 50 #define HIT_INVALIDATE_SD 0x13 51 #define HIT_WRITEBACK_INV_SD 0x17 52 #define HIT_WRITEBACK_SD 0x1b 53 #define HIT_SET_VIRTUAL_SI 0x1e 54 #define HIT_SET_VIRTUAL_SD 0x1f 55 56 /* 57 * R5000-specific cacheops 58 */ 59 #define R5K_PAGE_INVALIDATE_S 0x17 60 61 /* 62 * RM7000-specific cacheops 63 */ 64 #define PAGE_INVALIDATE_T 0x16 65 66 /* 67 * R10000-specific cacheops 68 * 69 * Cacheops 0x02, 0x06, 0x0a, 0x0c-0x0e, 0x16, 0x1a and 0x1e are unused. 70 * Most of the _S cacheops are identical to the R4000SC _SD cacheops. 71 */ 72 #define INDEX_WRITEBACK_INV_S 0x03 73 #define INDEX_LOAD_TAG_S 0x07 74 #define INDEX_STORE_TAG_S 0x0B 75 #define HIT_INVALIDATE_S 0x13 76 #define CACHE_BARRIER 0x14 77 #define HIT_WRITEBACK_INV_S 0x17 78 #define INDEX_LOAD_DATA_I 0x18 79 #define INDEX_LOAD_DATA_D 0x19 80 #define INDEX_LOAD_DATA_S 0x1b 81 #define INDEX_STORE_DATA_I 0x1c 82 #define INDEX_STORE_DATA_D 0x1d 83 #define INDEX_STORE_DATA_S 0x1f 84 85 #endif /* __ASM_CACHEOPS_H */ 86