xref: /openbmc/u-boot/arch/mips/include/asm/cache.h (revision ae51b570)
1 /*
2  * Copyright (c) 2011 The Chromium OS Authors.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef __MIPS_CACHE_H__
8 #define __MIPS_CACHE_H__
9 
10 #define L1_CACHE_SHIFT		CONFIG_MIPS_L1_CACHE_SHIFT
11 #define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)
12 
13 #define ARCH_DMA_MINALIGN	(L1_CACHE_BYTES)
14 
15 #endif /* __MIPS_CACHE_H__ */
16