xref: /openbmc/u-boot/arch/mips/include/asm/cache.h (revision f53830e7)
172d4dd41SAnton Staaf /*
272d4dd41SAnton Staaf  * Copyright (c) 2011 The Chromium OS Authors.
372d4dd41SAnton Staaf  *
41a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
572d4dd41SAnton Staaf  */
672d4dd41SAnton Staaf 
772d4dd41SAnton Staaf #ifndef __MIPS_CACHE_H__
872d4dd41SAnton Staaf #define __MIPS_CACHE_H__
972d4dd41SAnton Staaf 
10*f53830e7SDaniel Schwierzeck #define L1_CACHE_SHIFT		CONFIG_MIPS_L1_CACHE_SHIFT
11*f53830e7SDaniel Schwierzeck #define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)
12*f53830e7SDaniel Schwierzeck 
13*f53830e7SDaniel Schwierzeck #define ARCH_DMA_MINALIGN	(L1_CACHE_BYTES)
1472d4dd41SAnton Staaf 
1572d4dd41SAnton Staaf #endif /* __MIPS_CACHE_H__ */
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