xref: /openbmc/u-boot/arch/mips/include/asm/byteorder.h (revision e77e65df)
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1996, 99, 2003 by Ralf Baechle
7  */
8 #ifndef _ASM_BYTEORDER_H
9 #define _ASM_BYTEORDER_H
10 
11 #include <asm/types.h>
12 
13 #ifdef __GNUC__
14 
15 #ifdef CONFIG_CPU_MIPSR2
16 
17 static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
18 {
19 	__asm__(
20 	"	wsbh	%0, %1			\n"
21 	: "=r" (x)
22 	: "r" (x));
23 
24 	return x;
25 }
26 #define __arch__swab16(x)	___arch__swab16(x)
27 
28 static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
29 {
30 	__asm__(
31 	"	wsbh	%0, %1			\n"
32 	"	rotr	%0, %0, 16		\n"
33 	: "=r" (x)
34 	: "r" (x));
35 
36 	return x;
37 }
38 #define __arch__swab32(x)	___arch__swab32(x)
39 
40 #ifdef CONFIG_CPU_MIPS64_R2
41 
42 static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
43 {
44 	__asm__(
45 	"	dsbh	%0, %1			\n"
46 	"	dshd	%0, %0			\n"
47 	"	drotr	%0, %0, 32		\n"
48 	: "=r" (x)
49 	: "r" (x));
50 
51 	return x;
52 }
53 
54 #define __arch__swab64(x)	___arch__swab64(x)
55 
56 #endif /* CONFIG_CPU_MIPS64_R2 */
57 
58 #endif /* CONFIG_CPU_MIPSR2 */
59 
60 #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
61 #  define __BYTEORDER_HAS_U64__
62 #  define __SWAB_64_THRU_32__
63 #endif
64 
65 #endif /* __GNUC__ */
66 
67 #if defined(__MIPSEB__)
68 #  include <linux/byteorder/big_endian.h>
69 #elif defined(__MIPSEL__)
70 #  include <linux/byteorder/little_endian.h>
71 #else
72 #  error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
73 #endif
74 
75 #endif /* _ASM_BYTEORDER_H */
76