xref: /openbmc/u-boot/arch/mips/dts/qca953x.dtsi (revision c978b524)
1/*
2 * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <dt-bindings/interrupt-controller/irq.h>
8#include "skeleton.dtsi"
9
10/ {
11	compatible = "qca,qca953x";
12
13	#address-cells = <1>;
14	#size-cells = <1>;
15
16	cpus {
17		#address-cells = <1>;
18		#size-cells = <0>;
19
20		cpu@0 {
21			device_type = "cpu";
22			compatible = "mips,mips24Kc";
23			reg = <0>;
24		};
25	};
26
27	clocks {
28		#address-cells = <1>;
29		#size-cells = <1>;
30		ranges;
31
32		xtal: xtal {
33			#clock-cells = <0>;
34			compatible = "fixed-clock";
35			clock-output-names = "xtal";
36		};
37	};
38
39	pinctrl {
40		u-boot,dm-pre-reloc;
41		compatible = "qca,qca953x-pinctrl";
42		ranges;
43		#address-cells = <1>;
44		#size-cells = <1>;
45		reg = <0x18040000 0x100>;
46	};
47
48	ahb {
49		compatible = "simple-bus";
50		ranges;
51
52		#address-cells = <1>;
53		#size-cells = <1>;
54
55		apb {
56			compatible = "simple-bus";
57			ranges;
58
59			#address-cells = <1>;
60			#size-cells = <1>;
61
62			uart0: uart@18020000 {
63				compatible = "ns16550";
64				reg = <0x18020000 0x20>;
65				reg-shift = <2>;
66				clock-frequency = <25000000>;
67				interrupts = <128 IRQ_TYPE_LEVEL_HIGH>;
68
69				status = "disabled";
70			};
71		};
72
73		spi0: spi@1f000000 {
74			compatible = "qca,ar7100-spi";
75			reg = <0x1f000000 0x10>;
76			interrupts = <129 IRQ_TYPE_LEVEL_HIGH>;
77
78			status = "disabled";
79
80			#address-cells = <1>;
81			#size-cells = <0>;
82		};
83	};
84};
85