mips/dts/qca953x.dtsi

*83d290c5STom Rini// SPDX-License-Identifier: GPL-2.0+
a2277cc3SWills Wang/*
a2277cc3SWills Wang * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
a2277cc3SWills Wang */
a2277cc3SWills Wang
a2277cc3SWills Wang#include <dt-bindings/interrupt-controller/irq.h>
a2277cc3SWills Wang#include "skeleton.dtsi"
a2277cc3SWills Wang
a2277cc3SWills Wang/ {
a2277cc3SWills Wang	compatible = "qca,qca953x";
a2277cc3SWills Wang
a2277cc3SWills Wang	#address-cells = <1>;
a2277cc3SWills Wang	#size-cells = <1>;
a2277cc3SWills Wang
a2277cc3SWills Wang	cpus {
a2277cc3SWills Wang		#address-cells = <1>;
a2277cc3SWills Wang		#size-cells = <0>;
a2277cc3SWills Wang
a2277cc3SWills Wang		cpu@0 {
a2277cc3SWills Wang			device_type = "cpu";
a2277cc3SWills Wang			compatible = "mips,mips24Kc";
a2277cc3SWills Wang			reg = <0>;
a2277cc3SWills Wang		};
a2277cc3SWills Wang	};
a2277cc3SWills Wang
a2277cc3SWills Wang	clocks {
a2277cc3SWills Wang		#address-cells = <1>;
a2277cc3SWills Wang		#size-cells = <1>;
a2277cc3SWills Wang		ranges;
a2277cc3SWills Wang
a2277cc3SWills Wang		xtal: xtal {
a2277cc3SWills Wang			#clock-cells = <0>;
a2277cc3SWills Wang			compatible = "fixed-clock";
a2277cc3SWills Wang			clock-output-names = "xtal";
a2277cc3SWills Wang		};
a2277cc3SWills Wang	};
a2277cc3SWills Wang
a2277cc3SWills Wang	pinctrl {
a2277cc3SWills Wang		u-boot,dm-pre-reloc;
a2277cc3SWills Wang		compatible = "qca,qca953x-pinctrl";
a2277cc3SWills Wang		ranges;
a2277cc3SWills Wang		#address-cells = <1>;
a2277cc3SWills Wang		#size-cells = <1>;
a2277cc3SWills Wang		reg = <0x18040000 0x100>;
a2277cc3SWills Wang	};
a2277cc3SWills Wang
a2277cc3SWills Wang	ahb {
a2277cc3SWills Wang		compatible = "simple-bus";
a2277cc3SWills Wang		ranges;
a2277cc3SWills Wang
a2277cc3SWills Wang		#address-cells = <1>;
a2277cc3SWills Wang		#size-cells = <1>;
a2277cc3SWills Wang
a2277cc3SWills Wang		apb {
a2277cc3SWills Wang			compatible = "simple-bus";
a2277cc3SWills Wang			ranges;
a2277cc3SWills Wang
a2277cc3SWills Wang			#address-cells = <1>;
a2277cc3SWills Wang			#size-cells = <1>;
a2277cc3SWills Wang
a2277cc3SWills Wang			uart0: uart@18020000 {
a2277cc3SWills Wang				compatible = "ns16550";
a2277cc3SWills Wang				reg = <0x18020000 0x20>;
a2277cc3SWills Wang				reg-shift = <2>;
a2277cc3SWills Wang				clock-frequency = <25000000>;
a2277cc3SWills Wang				interrupts = <128 IRQ_TYPE_LEVEL_HIGH>;
a2277cc3SWills Wang
a2277cc3SWills Wang				status = "disabled";
a2277cc3SWills Wang			};
a2277cc3SWills Wang		};
a2277cc3SWills Wang
a2277cc3SWills Wang		spi0: spi@1f000000 {
a2277cc3SWills Wang			compatible = "qca,ar7100-spi";
a2277cc3SWills Wang			reg = <0x1f000000 0x10>;
a2277cc3SWills Wang			interrupts = <129 IRQ_TYPE_LEVEL_HIGH>;
a2277cc3SWills Wang
a2277cc3SWills Wang			status = "disabled";
a2277cc3SWills Wang
a2277cc3SWills Wang			#address-cells = <1>;
a2277cc3SWills Wang			#size-cells = <0>;
a2277cc3SWills Wang		};
a2277cc3SWills Wang	};
a2277cc3SWills Wang};