xref: /openbmc/u-boot/arch/mips/dts/pic32mzda.dtsi (revision e246b728)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2015 Microchip Technology, Inc.
4 * Purna Chandra Mandal, <purna.mandal@microchip.com>
5 */
6
7#include <dt-bindings/interrupt-controller/irq.h>
8#include <dt-bindings/clock/microchip,clock.h>
9#include <dt-bindings/gpio/gpio.h>
10#include "skeleton.dtsi"
11
12/ {
13	compatible = "microchip,pic32mzda", "microchip,pic32mz";
14
15	aliases {
16		gpio0 = &gpioA;
17		gpio1 = &gpioB;
18		gpio2 = &gpioC;
19		gpio3 = &gpioD;
20		gpio4 = &gpioE;
21		gpio5 = &gpioF;
22		gpio6 = &gpioG;
23		gpio7 = &gpioH;
24		gpio8 = &gpioJ;
25		gpio9 = &gpioK;
26	};
27
28	cpus {
29		cpu@0 {
30			compatible = "mips,mips14kc";
31		};
32	};
33
34	clock: clk@1f801200 {
35		compatible = "microchip,pic32mzda-clk";
36		reg = <0x1f801200 0x1000>;
37		#clock-cells = <1>;
38	};
39
40	uart1: serial@1f822000 {
41		compatible = "microchip,pic32mzda-uart";
42		reg = <0x1f822000 0x50>;
43		interrupts = <112 IRQ_TYPE_LEVEL_HIGH>;
44		status = "disabled";
45		clocks = <&clock PB2CLK>;
46	};
47
48	uart2: serial@1f822200 {
49		compatible = "microchip,pic32mzda-uart";
50		reg = <0x1f822200 0x50>;
51		interrupts = <145 IRQ_TYPE_LEVEL_HIGH>;
52		clocks = <&clock PB2CLK>;
53		status = "disabled";
54	};
55
56	uart6: serial@1f822a00 {
57		compatible = "microchip,pic32mzda-uart";
58		reg = <0x1f822a00 0x50>;
59		interrupts = <188 IRQ_TYPE_LEVEL_HIGH>;
60		clocks = <&clock PB2CLK>;
61		status = "disabled";
62	};
63
64	evic: interrupt-controller@1f810000 {
65		compatible = "microchip,pic32mzda-evic";
66		interrupt-controller;
67		#interrupt-cells = <2>;
68		reg = <0x1f810000 0x1000>;
69	};
70
71	pinctrl: pinctrl@1f801400 {
72		compatible = "microchip,pic32mzda-pinctrl";
73		reg = <0x1f801400 0x100>, /* in  */
74		      <0x1f801500 0x200>, /* out */
75		      <0x1f860000 0xa00>; /* port */
76		reg-names = "ppsin","ppsout","port";
77		status = "disabled";
78
79		ranges = <0 0x1f860000 0xa00>;
80		#address-cells = <1>;
81		#size-cells = <1>;
82		gpioA: gpio0@0 {
83			compatible = "microchip,pic32mzda-gpio";
84			reg = <0x000 0x48>;
85			gpio-controller;
86			#gpio-cells = <2>;
87		};
88
89		gpioB: gpio1@100 {
90			compatible = "microchip,pic32mzda-gpio";
91			reg = <0x100 0x48>;
92			gpio-controller;
93			#gpio-cells = <2>;
94		};
95
96		gpioC: gpio2@200 {
97			compatible = "microchip,pic32mzda-gpio";
98			reg = <0x200 0x48>;
99			gpio-controller;
100			#gpio-cells = <2>;
101		};
102
103		gpioD: gpio3@300 {
104			compatible = "microchip,pic32mzda-gpio";
105			reg = <0x300 0x48>;
106			gpio-controller;
107			#gpio-cells = <2>;
108		};
109
110		gpioE: gpio4@400 {
111			compatible = "microchip,pic32mzda-gpio";
112			reg = <0x400 0x48>;
113			gpio-controller;
114			#gpio-cells = <2>;
115		};
116
117		gpioF: gpio5@500 {
118			compatible = "microchip,pic32mzda-gpio";
119			reg = <0x500 0x48>;
120			gpio-controller;
121			#gpio-cells = <2>;
122		};
123
124		gpioG: gpio6@600 {
125			compatible = "microchip,pic32mzda-gpio";
126			reg = <0x600 0x48>;
127			gpio-controller;
128			#gpio-cells = <2>;
129		};
130
131		gpioH: gpio7@700 {
132			compatible = "microchip,pic32mzda-gpio";
133			reg = <0x700 0x48>;
134			gpio-controller;
135			#gpio-cells = <2>;
136		};
137
138		gpioJ: gpio8@800 {
139			compatible = "microchip,pic32mzda-gpio";
140			reg = <0x800 0x48>;
141			gpio-controller;
142			#gpio-cells = <2>;
143		};
144
145		gpioK: gpio9@900 {
146			compatible = "microchip,pic32mzda-gpio";
147			reg = <0x900 0x48>;
148			gpio-controller;
149			#gpio-cells = <2>;
150		};
151	};
152
153	sdhci: sdhci@1f8ec000 {
154		compatible = "microchip,pic32mzda-sdhci";
155		reg = <0x1f8ec000 0x100>;
156		interrupts = <191 IRQ_TYPE_LEVEL_HIGH>;
157		clocks = <&clock REF4CLK>, <&clock PB5CLK>;
158		clock-names = "base_clk", "sys_clk";
159		clock-freq-min-max = <25000000>,<25000000>;
160		bus-width = <4>;
161		status = "disabled";
162	};
163
164	ethernet: ethernet@1f882000 {
165		compatible = "microchip,pic32mzda-eth";
166		reg = <0x1f882000 0x1000>;
167		interrupts = <153 IRQ_TYPE_LEVEL_HIGH>;
168		clocks = <&clock PB5CLK>;
169		status = "disabled";
170		#address-cells = <1>;
171		#size-cells = <0>;
172	};
173
174	usb: musb@1f8e3000 {
175		compatible = "microchip,pic32mzda-usb";
176		reg = <0x1f8e3000 0x1000>,
177		      <0x1f884000 0x1000>;
178		reg-names = "mc", "control";
179		interrupts = <132 IRQ_TYPE_EDGE_RISING>,
180			     <133 IRQ_TYPE_LEVEL_HIGH>;
181		clocks = <&clock PB5CLK>;
182		clock-names = "usb_clk";
183		status = "disabled";
184	};
185};
186