16787c1ecSGregory CLEMENT// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 26787c1ecSGregory CLEMENT/* 36787c1ecSGregory CLEMENT * Copyright (c) 2018 Microsemi Corporation 46787c1ecSGregory CLEMENT */ 56787c1ecSGregory CLEMENT 66787c1ecSGregory CLEMENT/dts-v1/; 76787c1ecSGregory CLEMENT#include "mscc,ocelot_pcb.dtsi" 86787c1ecSGregory CLEMENT 96787c1ecSGregory CLEMENT/ { 106787c1ecSGregory CLEMENT model = "Ocelot PCB123 Reference Board"; 116787c1ecSGregory CLEMENT compatible = "mscc,ocelot-pcb123", "mscc,ocelot"; 1226ad3c43SLars Povlsen 1326ad3c43SLars Povlsen chosen { 1426ad3c43SLars Povlsen stdout-path = "serial0:115200n8"; 1526ad3c43SLars Povlsen }; 1626ad3c43SLars Povlsen 1726ad3c43SLars Povlsen gpio-leds { 1826ad3c43SLars Povlsen compatible = "gpio-leds"; 1926ad3c43SLars Povlsen 2026ad3c43SLars Povlsen status_green { 2126ad3c43SLars Povlsen label = "pcb123:green:status"; 2226ad3c43SLars Povlsen gpios = <&sgpio 43 1>; /* p11.1 */ 2326ad3c43SLars Povlsen default-state = "on"; 2426ad3c43SLars Povlsen }; 2526ad3c43SLars Povlsen 2626ad3c43SLars Povlsen status_red { 2726ad3c43SLars Povlsen label = "pcb123:red:status"; 2826ad3c43SLars Povlsen gpios = <&sgpio 11 1>; /* p11.0 */ 2926ad3c43SLars Povlsen default-state = "off"; 3026ad3c43SLars Povlsen }; 3126ad3c43SLars Povlsen }; 3226ad3c43SLars Povlsen}; 3326ad3c43SLars Povlsen 3426ad3c43SLars Povlsen&sgpio { 3526ad3c43SLars Povlsen status = "okay"; 3626ad3c43SLars Povlsen mscc,sgpio-ports = <0x00FFFFFF>; 376787c1ecSGregory CLEMENT}; 38*55037902SGregory CLEMENT 39*55037902SGregory CLEMENT&mdio0 { 40*55037902SGregory CLEMENT status = "okay"; 41*55037902SGregory CLEMENT}; 42*55037902SGregory CLEMENT 43*55037902SGregory CLEMENT&port0 { 44*55037902SGregory CLEMENT phy-handle = <&phy0>; 45*55037902SGregory CLEMENT}; 46*55037902SGregory CLEMENT 47*55037902SGregory CLEMENT&port1 { 48*55037902SGregory CLEMENT phy-handle = <&phy1>; 49*55037902SGregory CLEMENT}; 50*55037902SGregory CLEMENT 51*55037902SGregory CLEMENT&port2 { 52*55037902SGregory CLEMENT phy-handle = <&phy2>; 53*55037902SGregory CLEMENT}; 54*55037902SGregory CLEMENT 55*55037902SGregory CLEMENT&port3 { 56*55037902SGregory CLEMENT phy-handle = <&phy3>; 57*55037902SGregory CLEMENT}; 58