1// SPDX-License-Identifier: GPL-2.0 2 3/ { 4 #address-cells = <1>; 5 #size-cells = <1>; 6 compatible = "ralink,mt7628a-soc"; 7 8 cpus { 9 #address-cells = <1>; 10 #size-cells = <0>; 11 12 cpu@0 { 13 compatible = "mti,mips24KEc"; 14 device_type = "cpu"; 15 reg = <0>; 16 }; 17 }; 18 19 resetc: reset-controller { 20 compatible = "ralink,rt2880-reset"; 21 #reset-cells = <1>; 22 }; 23 24 cpuintc: interrupt-controller { 25 #address-cells = <0>; 26 #interrupt-cells = <1>; 27 interrupt-controller; 28 compatible = "mti,cpu-interrupt-controller"; 29 }; 30 31 palmbus@10000000 { 32 compatible = "palmbus", "simple-bus"; 33 reg = <0x10000000 0x200000>; 34 ranges = <0x0 0x10000000 0x1FFFFF>; 35 36 #address-cells = <1>; 37 #size-cells = <1>; 38 39 sysc: system-controller@0 { 40 compatible = "ralink,mt7620a-sysc", "syscon"; 41 reg = <0x0 0x100>; 42 }; 43 44 syscon-reboot { 45 compatible = "syscon-reboot"; 46 regmap = <&sysc>; 47 offset = <0x34>; 48 mask = <0x1>; 49 }; 50 51 intc: interrupt-controller@200 { 52 compatible = "ralink,rt2880-intc"; 53 reg = <0x200 0x100>; 54 55 interrupt-controller; 56 #interrupt-cells = <1>; 57 58 resets = <&resetc 9>; 59 reset-names = "intc"; 60 61 interrupt-parent = <&cpuintc>; 62 interrupts = <2>; 63 64 ralink,intc-registers = <0x9c 0xa0 65 0x6c 0xa4 66 0x80 0x78>; 67 }; 68 69 memory-controller@300 { 70 compatible = "ralink,mt7620a-memc"; 71 reg = <0x300 0x100>; 72 }; 73 74 spi0: spi@b00 { 75 compatible = "ralink,mt7621-spi"; 76 reg = <0xb00 0x40>; 77 #address-cells = <1>; 78 #size-cells = <0>; 79 80 clock-frequency = <200000000>; 81 }; 82 83 uart0: uartlite@c00 { 84 compatible = "ns16550a"; 85 reg = <0xc00 0x100>; 86 87 resets = <&resetc 12>; 88 reset-names = "uart0"; 89 90 interrupt-parent = <&intc>; 91 interrupts = <20>; 92 93 reg-shift = <2>; 94 }; 95 96 uart1: uart1@d00 { 97 compatible = "ns16550a"; 98 reg = <0xd00 0x100>; 99 100 resets = <&resetc 19>; 101 reset-names = "uart1"; 102 103 interrupt-parent = <&intc>; 104 interrupts = <21>; 105 106 reg-shift = <2>; 107 }; 108 109 uart2: uart2@e00 { 110 compatible = "ns16550a"; 111 reg = <0xe00 0x100>; 112 113 resets = <&resetc 20>; 114 reset-names = "uart2"; 115 116 interrupt-parent = <&intc>; 117 interrupts = <22>; 118 119 reg-shift = <2>; 120 }; 121 }; 122 123 eth@10110000 { 124 compatible = "mediatek,mt7622-eth"; 125 reg = <0x10100000 0x10000 126 0x10110000 0x8000>; 127 128 syscon = <&sysc>; 129 }; 130 131 usb_phy: usb-phy@10120000 { 132 compatible = "mediatek,mt7628-usbphy"; 133 reg = <0x10120000 0x1000>; 134 135 #phy-cells = <0>; 136 137 ralink,sysctl = <&sysc>; 138 resets = <&resetc 22 &resetc 25>; 139 reset-names = "host", "device"; 140 }; 141 142 ehci@101c0000 { 143 compatible = "generic-ehci"; 144 reg = <0x101c0000 0x1000>; 145 146 phys = <&usb_phy>; 147 phy-names = "usb"; 148 149 interrupt-parent = <&intc>; 150 interrupts = <18>; 151 }; 152}; 153