1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2018 Microsemi Corporation 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7 8/ { 9 #address-cells = <1>; 10 #size-cells = <1>; 11 compatible = "mscc,luton"; 12 13 cpus { 14 #address-cells = <1>; 15 #size-cells = <0>; 16 17 cpu@0 { 18 compatible = "mips,mips24KEc"; 19 device_type = "cpu"; 20 reg = <0>; 21 }; 22 }; 23 24 aliases { 25 serial0 = &uart0; 26 }; 27 28 ahb_clk: ahb-clk { 29 compatible = "fixed-clock"; 30 #clock-cells = <0>; 31 clock-frequency = <208333333>; 32 }; 33 34 ahb { 35 compatible = "simple-bus"; 36 #address-cells = <1>; 37 #size-cells = <1>; 38 ranges = <0 0x60000000 0x10200000>; 39 40 uart0: serial@10100000 { 41 pinctrl-0 = <&uart_pins>; 42 pinctrl-names = "default"; 43 44 compatible = "ns16550a"; 45 reg = <0x10100000 0x20>; 46 clocks = <&ahb_clk>; 47 reg-io-width = <4>; 48 reg-shift = <2>; 49 50 status = "disabled"; 51 }; 52 53 gpio: pinctrl@70068 { 54 compatible = "mscc,luton-pinctrl"; 55 reg = <0x70068 0x68>; 56 gpio-controller; 57 #gpio-cells = <2>; 58 gpio-ranges = <&gpio 0 0 32>; 59 60 uart_pins: uart-pins { 61 pins = "GPIO_30", "GPIO_31"; 62 function = "uart"; 63 }; 64 65 }; 66 67 gpio_spi_bitbang: gpio@10000064 { 68 compatible = "mscc,spi-bitbang-gpio"; 69 reg = <0x10000064 0x4>; 70 gpio-controller; 71 #gpio-cells = <2>; 72 73 }; 74 75 spi0: spi-bitbang { 76 compatible = "spi-gpio"; 77 status = "okay"; 78 gpio-sck = <&gpio_spi_bitbang 6 0>; 79 gpio-miso = <&gpio_spi_bitbang 0 0>; 80 gpio-mosi = <&gpio_spi_bitbang 5 0>; 81 cs-gpios = <&gpio_spi_bitbang 1 0>; 82 num-chipselects = <1>; 83 #address-cells = <1>; 84 #size-cells = <0>; 85 }; 86 }; 87}; 88