xref: /openbmc/u-boot/arch/mips/dts/jz4780.dtsi (revision 3098ade2)
1// SPDX-License-Identifier: GPL-2.0+
2
3#include <dt-bindings/clock/jz4780-cgu.h>
4
5/ {
6	#address-cells = <1>;
7	#size-cells = <1>;
8	compatible = "ingenic,jz4780";
9
10	cpuintc: interrupt-controller {
11		#address-cells = <0>;
12		#interrupt-cells = <1>;
13		interrupt-controller;
14		compatible = "mti,cpu-interrupt-controller";
15	};
16
17	intc: interrupt-controller@10001000 {
18		compatible = "ingenic,jz4780-intc";
19		reg = <0x10001000 0x50>;
20
21		interrupt-controller;
22		#interrupt-cells = <1>;
23
24		interrupt-parent = <&cpuintc>;
25		interrupts = <2>;
26	};
27
28	ext: ext {
29		compatible = "fixed-clock";
30		#clock-cells = <0>;
31	};
32
33	rtc: rtc {
34		compatible = "fixed-clock";
35		#clock-cells = <0>;
36		clock-frequency = <32768>;
37	};
38
39	cgu: jz4780-cgu@10000000 {
40		compatible = "ingenic,jz4780-cgu";
41		reg = <0x10000000 0x100>;
42
43		clocks = <&ext>, <&rtc>;
44		clock-names = "ext", "rtc";
45
46		#clock-cells = <1>;
47	};
48
49	mmc0: mmc@13450000 {
50		compatible = "ingenic,jz4780-mmc";
51		reg = <0x13450000 0x1000>;
52
53		status = "disabled";
54
55		clocks = <&cgu JZ4780_CLK_MSC0>;
56		clock-names = "mmc";
57	};
58
59	mmc1: mmc@13460000 {
60		compatible = "ingenic,jz4780-mmc";
61		reg = <0x13460000 0x1000>;
62
63		clocks = <&cgu JZ4780_CLK_MSC1>;
64		clock-names = "mmc";
65
66		status = "disabled";
67	};
68
69	uart0: serial@10030000 {
70		compatible = "ingenic,jz4780-uart";
71		reg = <0x10030000 0x100>;
72		reg-shift = <2>;
73
74		interrupt-parent = <&intc>;
75		interrupts = <51>;
76
77		clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
78		clock-names = "baud", "module";
79
80		status = "disabled";
81	};
82
83	uart1: serial@10031000 {
84		compatible = "ingenic,jz4780-uart";
85		reg = <0x10031000 0x100>;
86		reg-shift = <2>;
87
88		interrupt-parent = <&intc>;
89		interrupts = <50>;
90
91		clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
92		clock-names = "baud", "module";
93
94		status = "disabled";
95	};
96
97	uart2: serial@10032000 {
98		compatible = "ingenic,jz4780-uart";
99		reg = <0x10032000 0x100>;
100		reg-shift = <2>;
101
102		interrupt-parent = <&intc>;
103		interrupts = <49>;
104
105		clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
106		clock-names = "baud", "module";
107
108		status = "disabled";
109	};
110
111	uart3: serial@10033000 {
112		compatible = "ingenic,jz4780-uart";
113		reg = <0x10033000 0x100>;
114		reg-shift = <2>;
115
116		interrupt-parent = <&intc>;
117		interrupts = <48>;
118
119		clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
120		clock-names = "baud", "module";
121
122		status = "disabled";
123	};
124
125	uart4: serial@10034000 {
126		compatible = "ingenic,jz4780-uart";
127		reg = <0x10034000 0x100>;
128		reg-shift = <2>;
129
130		interrupt-parent = <&intc>;
131		interrupts = <34>;
132
133		clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
134		clock-names = "baud", "module";
135
136		status = "disabled";
137	};
138
139	nemc: nemc@13410000 {
140		compatible = "ingenic,jz4780-nemc";
141		reg = <0x13410000 0x10000>;
142		#address-cells = <2>;
143		#size-cells = <1>;
144		ranges = <1 0 0x1b000000 0x1000000
145			  2 0 0x1a000000 0x1000000
146			  3 0 0x19000000 0x1000000
147			  4 0 0x18000000 0x1000000
148			  5 0 0x17000000 0x1000000
149			  6 0 0x16000000 0x1000000>;
150
151		clocks = <&cgu JZ4780_CLK_NEMC>;
152
153		status = "disabled";
154	};
155
156	bch: bch@134d0000 {
157		compatible = "ingenic,jz4780-bch";
158		reg = <0x134d0000 0x10000>;
159
160		clocks = <&cgu JZ4780_CLK_BCH>;
161
162		status = "disabled";
163	};
164};
165