1 #ifndef __DT_BINDINGS_POWER_RK3399_POWER_H__ 2 #define __DT_BINDINGS_POWER_RK3399_POWER_H__ 3 4 /* VD_CORE_L */ 5 #define RK3399_PD_A53_L0 0 6 #define RK3399_PD_A53_L1 1 7 #define RK3399_PD_A53_L2 2 8 #define RK3399_PD_A53_L3 3 9 #define RK3399_PD_SCU_L 4 10 11 /* VD_CORE_B */ 12 #define RK3399_PD_A72_B0 5 13 #define RK3399_PD_A72_B1 6 14 #define RK3399_PD_SCU_B 7 15 16 /* VD_LOGIC */ 17 #define RK3399_PD_TCPD0 8 18 #define RK3399_PD_TCPD1 9 19 #define RK3399_PD_CCI 10 20 #define RK3399_PD_CCI0 11 21 #define RK3399_PD_CCI1 12 22 #define RK3399_PD_PERILP 13 23 #define RK3399_PD_PERIHP 14 24 #define RK3399_PD_VIO 15 25 #define RK3399_PD_VO 16 26 #define RK3399_PD_VOPB 17 27 #define RK3399_PD_VOPL 18 28 #define RK3399_PD_ISP0 19 29 #define RK3399_PD_ISP1 20 30 #define RK3399_PD_HDCP 21 31 #define RK3399_PD_GMAC 22 32 #define RK3399_PD_EMMC 23 33 #define RK3399_PD_USB3 24 34 #define RK3399_PD_EDP 25 35 #define RK3399_PD_GIC 26 36 #define RK3399_PD_SD 27 37 #define RK3399_PD_SDIOAUDIO 28 38 #define RK3399_PD_ALIVE 29 39 40 /* VD_CENTER */ 41 #define RK3399_PD_CENTER 30 42 #define RK3399_PD_VCODEC 31 43 #define RK3399_PD_VDU 32 44 #define RK3399_PD_RGA 33 45 #define RK3399_PD_IEP 34 46 47 /* VD_GPU */ 48 #define RK3399_PD_GPU 35 49 50 /* VD_PMU */ 51 #define RK3399_PD_PMU 36 52 53 #endif 54