18946034aSSimon Glass /* 28946034aSSimon Glass * This header provides constants for binding nvidia,tegra*-gpio. 38946034aSSimon Glass * 48946034aSSimon Glass * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below 58946034aSSimon Glass * provide names for this. 68946034aSSimon Glass * 78946034aSSimon Glass * The second cell contains standard flag values specified in gpio.h. 88946034aSSimon Glass */ 98946034aSSimon Glass 108946034aSSimon Glass #ifndef _DT_BINDINGS_GPIO_TEGRA_GPIO_H 118946034aSSimon Glass #define _DT_BINDINGS_GPIO_TEGRA_GPIO_H 128946034aSSimon Glass 138946034aSSimon Glass #include <dt-bindings/gpio/gpio.h> 148946034aSSimon Glass 15*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_A 0 16*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_B 1 17*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_C 2 18*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_D 3 19*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_E 4 20*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_F 5 21*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_G 6 22*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_H 7 23*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_I 8 24*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_J 9 25*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_K 10 26*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_L 11 27*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_M 12 28*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_N 13 29*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_O 14 30*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_P 15 31*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_Q 16 32*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_R 17 33*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_S 18 34*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_T 19 35*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_U 20 36*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_V 21 37*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_W 22 38*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_X 23 39*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_Y 24 40*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_Z 25 41*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_AA 26 42*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_BB 27 43*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_CC 28 44*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_DD 29 45*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_EE 30 46*e6bf0ca0SStephen Warren #define TEGRA_GPIO_PORT_FF 31 478946034aSSimon Glass 48*e6bf0ca0SStephen Warren #define TEGRA_GPIO(port, offset) \ 49*e6bf0ca0SStephen Warren ((TEGRA_GPIO_PORT_##port * 8) + offset) 508946034aSSimon Glass 518946034aSSimon Glass #endif 52