1/* 2 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8#include "skeleton.dtsi" 9 10/ { 11 compatible = "brcm,bcm6358"; 12 13 cpus { 14 reg = <0xfffe0000 0x4>; 15 #address-cells = <1>; 16 #size-cells = <0>; 17 u-boot,dm-pre-reloc; 18 19 cpu@0 { 20 compatible = "brcm,bcm6358-cpu", "mips,mips4Kc"; 21 device_type = "cpu"; 22 reg = <0>; 23 u-boot,dm-pre-reloc; 24 }; 25 26 cpu@1 { 27 compatible = "brcm,bcm6358-cpu", "mips,mips4Kc"; 28 device_type = "cpu"; 29 reg = <1>; 30 u-boot,dm-pre-reloc; 31 }; 32 }; 33 34 clocks { 35 compatible = "simple-bus"; 36 #address-cells = <1>; 37 #size-cells = <1>; 38 u-boot,dm-pre-reloc; 39 40 periph_osc: periph-osc { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <50000000>; 44 u-boot,dm-pre-reloc; 45 }; 46 }; 47 48 pflash: nor@1e000000 { 49 compatible = "cfi-flash"; 50 reg = <0x1e000000 0x2000000>; 51 bank-width = <2>; 52 #address-cells = <1>; 53 #size-cells = <1>; 54 55 status = "disabled"; 56 }; 57 58 ubus { 59 compatible = "simple-bus"; 60 #address-cells = <1>; 61 #size-cells = <1>; 62 u-boot,dm-pre-reloc; 63 64 pll_cntl: syscon@fffe0008 { 65 compatible = "syscon"; 66 reg = <0xfffe0008 0x4>; 67 }; 68 69 syscon-reboot { 70 compatible = "syscon-reboot"; 71 regmap = <&pll_cntl>; 72 offset = <0x0>; 73 mask = <0x1>; 74 }; 75 76 gpio1: gpio-controller@fffe0080 { 77 compatible = "brcm,bcm6345-gpio"; 78 reg = <0xfffe0080 0x4>, <0xfffe0088 0x4>; 79 gpio-controller; 80 #gpio-cells = <2>; 81 ngpios = <8>; 82 83 status = "disabled"; 84 }; 85 86 gpio0: gpio-controller@fffe0084 { 87 compatible = "brcm,bcm6345-gpio"; 88 reg = <0xfffe0084 0x4>, <0xfffe008c 0x4>; 89 gpio-controller; 90 #gpio-cells = <2>; 91 92 status = "disabled"; 93 }; 94 95 leds: led-controller@fffe00d0 { 96 compatible = "brcm,bcm6358-leds"; 97 reg = <0xfffe00d0 0x8>; 98 #address-cells = <1>; 99 #size-cells = <0>; 100 101 status = "disabled"; 102 }; 103 104 uart0: serial@fffe0100 { 105 compatible = "brcm,bcm6345-uart"; 106 reg = <0xfffe0100 0x18>; 107 clocks = <&periph_osc>; 108 109 status = "disabled"; 110 }; 111 112 uart1: serial@fffe0120 { 113 compatible = "brcm,bcm6345-uart"; 114 reg = <0xfffe0120 0x18>; 115 clocks = <&periph_osc>; 116 117 status = "disabled"; 118 }; 119 120 memory-controller@fffe1200 { 121 compatible = "brcm,bcm6358-mc"; 122 reg = <0xfffe1200 0x1000>; 123 u-boot,dm-pre-reloc; 124 }; 125 }; 126}; 127