xref: /openbmc/u-boot/arch/mips/dts/brcm,bcm6328.dtsi (revision 77ca99d1)
1/*
2 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
3 *
4 * SPDX-License-Identifier:	GPL-2.0+
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8#include "skeleton.dtsi"
9
10/ {
11	compatible = "brcm,bcm6328";
12
13	cpus {
14		reg = <0x10000000 0x4>;
15		#address-cells = <1>;
16		#size-cells = <0>;
17		u-boot,dm-pre-reloc;
18
19		cpu@0 {
20			compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
21			device_type = "cpu";
22			reg = <0>;
23			u-boot,dm-pre-reloc;
24		};
25
26		cpu@1 {
27			compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
28			device_type = "cpu";
29			reg = <1>;
30			u-boot,dm-pre-reloc;
31		};
32	};
33
34	clocks {
35		compatible = "simple-bus";
36		#address-cells = <1>;
37		#size-cells = <1>;
38		u-boot,dm-pre-reloc;
39
40		periph_osc: periph-osc {
41			compatible = "fixed-clock";
42			#clock-cells = <0>;
43			clock-frequency = <50000000>;
44			u-boot,dm-pre-reloc;
45		};
46	};
47
48	ubus {
49		compatible = "simple-bus";
50		#address-cells = <1>;
51		#size-cells = <1>;
52		u-boot,dm-pre-reloc;
53
54		pll_cntl: syscon@10000068 {
55			compatible = "syscon";
56			reg = <0x10000068 0x4>;
57		};
58
59		syscon-reboot {
60			compatible = "syscon-reboot";
61			regmap = <&pll_cntl>;
62			offset = <0x0>;
63			mask = <0x1>;
64		};
65
66		uart0: serial@10000100 {
67			compatible = "brcm,bcm6345-uart";
68			reg = <0x10000100 0x18>;
69			clocks = <&periph_osc>;
70
71			status = "disabled";
72		};
73
74		uart1: serial@10000120 {
75			compatible = "brcm,bcm6345-uart";
76			reg = <0x10000120 0x18>;
77			clocks = <&periph_osc>;
78
79			status = "disabled";
80		};
81
82		memory-controller@10003000 {
83			compatible = "brcm,bcm6328-mc";
84			reg = <0x10003000 0x1000>;
85			u-boot,dm-pre-reloc;
86		};
87	};
88};
89