1/* 2 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7#include <dt-bindings/clock/bcm63268-clock.h> 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/reset/bcm63268-reset.h> 10#include "skeleton.dtsi" 11 12/ { 13 compatible = "brcm,bcm63268"; 14 15 cpus { 16 reg = <0x10000000 0x4>; 17 #address-cells = <1>; 18 #size-cells = <0>; 19 u-boot,dm-pre-reloc; 20 21 cpu@0 { 22 compatible = "brcm,bcm63268-cpu", "mips,mips4Kc"; 23 device_type = "cpu"; 24 reg = <0>; 25 u-boot,dm-pre-reloc; 26 }; 27 28 cpu@1 { 29 compatible = "brcm,bcm63268-cpu", "mips,mips4Kc"; 30 device_type = "cpu"; 31 reg = <1>; 32 u-boot,dm-pre-reloc; 33 }; 34 }; 35 36 clocks { 37 compatible = "simple-bus"; 38 #address-cells = <1>; 39 #size-cells = <1>; 40 u-boot,dm-pre-reloc; 41 42 periph_osc: periph-osc { 43 compatible = "fixed-clock"; 44 #clock-cells = <0>; 45 clock-frequency = <50000000>; 46 u-boot,dm-pre-reloc; 47 }; 48 49 periph_clk: periph-clk { 50 compatible = "brcm,bcm6345-clk"; 51 reg = <0x10000004 0x4>; 52 #clock-cells = <1>; 53 }; 54 55 timer_clk: timer-clk { 56 compatible = "brcm,bcm6345-clk"; 57 reg = <0x100000ac 0x4>; 58 #clock-cells = <1>; 59 }; 60 }; 61 62 ubus { 63 compatible = "simple-bus"; 64 #address-cells = <1>; 65 #size-cells = <1>; 66 u-boot,dm-pre-reloc; 67 68 pll_cntl: syscon@10000008 { 69 compatible = "syscon"; 70 reg = <0x10000008 0x4>; 71 }; 72 73 syscon-reboot { 74 compatible = "syscon-reboot"; 75 regmap = <&pll_cntl>; 76 offset = <0x0>; 77 mask = <0x1>; 78 }; 79 80 periph_rst: reset-controller@10000010 { 81 compatible = "brcm,bcm6345-reset"; 82 reg = <0x10000010 0x4>; 83 #reset-cells = <1>; 84 }; 85 86 gpio1: gpio-controller@100000c0 { 87 compatible = "brcm,bcm6345-gpio"; 88 reg = <0x100000c0 0x4>, <0x100000c8 0x4>; 89 gpio-controller; 90 #gpio-cells = <2>; 91 ngpios = <20>; 92 93 status = "disabled"; 94 }; 95 96 gpio0: gpio-controller@100000c4 { 97 compatible = "brcm,bcm6345-gpio"; 98 reg = <0x100000c4 0x4>, <0x100000cc 0x4>; 99 gpio-controller; 100 #gpio-cells = <2>; 101 102 status = "disabled"; 103 }; 104 105 uart0: serial@10000180 { 106 compatible = "brcm,bcm6345-uart"; 107 reg = <0x10000180 0x18>; 108 clocks = <&periph_osc>; 109 110 status = "disabled"; 111 }; 112 113 uart1: serial@100001a0 { 114 compatible = "brcm,bcm6345-uart"; 115 reg = <0x100001a0 0x18>; 116 clocks = <&periph_osc>; 117 118 status = "disabled"; 119 }; 120 121 leds: led-controller@10001900 { 122 compatible = "brcm,bcm6328-leds"; 123 reg = <0x10001900 0x24>; 124 #address-cells = <1>; 125 #size-cells = <0>; 126 127 status = "disabled"; 128 }; 129 130 memory-controller@10003000 { 131 compatible = "brcm,bcm6328-mc"; 132 reg = <0x10003000 0x1000>; 133 u-boot,dm-pre-reloc; 134 }; 135 }; 136}; 137