xref: /openbmc/u-boot/arch/mips/dts/brcm,bcm6358.dtsi (revision e30d2bd4)

/*
 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"

/ {
	compatible = "brcm,bcm6358";

	cpus {
		reg = <0xfffe0000 0x4>;
		#address-cells = <1>;
		#size-cells = <0>;
		u-boot,dm-pre-reloc;

		cpu@0 {
			compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
			device_type = "cpu";
			reg = <0>;
			u-boot,dm-pre-reloc;
		};

		cpu@1 {
			compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
			device_type = "cpu";
			reg = <1>;
			u-boot,dm-pre-reloc;
		};
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		u-boot,dm-pre-reloc;

		periph_osc: periph-osc {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <50000000>;
			u-boot,dm-pre-reloc;
		};
	};

	pflash: nor@1e000000 {
		compatible = "cfi-flash";
		reg = <0x1e000000 0x2000000>;
		bank-width = <2>;
		#address-cells = <1>;
		#size-cells = <1>;

		status = "disabled";
	};

	ubus {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		u-boot,dm-pre-reloc;

		pll_cntl: syscon@fffe0008 {
			compatible = "syscon";
			reg = <0xfffe0008 0x4>;
		};

		syscon-reboot {
			compatible = "syscon-reboot";
			regmap = <&pll_cntl>;
			offset = <0x0>;
			mask = <0x1>;
		};

		uart0: serial@fffe0100 {
			compatible = "brcm,bcm6345-uart";
			reg = <0xfffe0100 0x18>;
			clocks = <&periph_osc>;

			status = "disabled";
		};

		uart1: serial@fffe0120 {
			compatible = "brcm,bcm6345-uart";
			reg = <0xfffe0120 0x18>;
			clocks = <&periph_osc>;

			status = "disabled";
		};

		memory-controller@fffe1200 {
			compatible = "brcm,bcm6358-mc";
			reg = <0xfffe1200 0x1000>;
			u-boot,dm-pre-reloc;
		};
	};
};