1/* 2 * Copyright (C) 2016 Marek Vasut <marex@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7#include "skeleton.dtsi" 8 9/ { 10 compatible = "qca,ar934x"; 11 12 #address-cells = <1>; 13 #size-cells = <1>; 14 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 cpu@0 { 20 device_type = "cpu"; 21 compatible = "mips,mips74Kc"; 22 reg = <0>; 23 }; 24 }; 25 26 clocks { 27 #address-cells = <1>; 28 #size-cells = <1>; 29 ranges; 30 31 xtal: xtal { 32 #clock-cells = <0>; 33 compatible = "fixed-clock"; 34 clock-output-names = "xtal"; 35 }; 36 }; 37 38 ahb { 39 compatible = "simple-bus"; 40 ranges; 41 42 #address-cells = <1>; 43 #size-cells = <1>; 44 45 apb { 46 compatible = "simple-bus"; 47 ranges; 48 49 #address-cells = <1>; 50 #size-cells = <1>; 51 52 ehci0: ehci@1b000100 { 53 compatible = "generic-ehci"; 54 reg = <0x1b000100 0x100>; 55 56 status = "disabled"; 57 }; 58 59 uart0: uart@18020000 { 60 compatible = "ns16550"; 61 reg = <0x18020000 0x20>; 62 reg-shift = <2>; 63 64 status = "disabled"; 65 }; 66 67 gmac0: eth@0x19000000 { 68 compatible = "qca,ag934x-mac"; 69 reg = <0x19000000 0x200>; 70 phy = <&phy0>; 71 phy-mode = "rgmii"; 72 73 status = "disabled"; 74 75 mdio { 76 #address-cells = <1>; 77 #size-cells = <0>; 78 phy0: ethernet-phy@0 { 79 reg = <0>; 80 }; 81 }; 82 }; 83 84 gmac1: eth@0x1a000000 { 85 compatible = "qca,ag934x-mac"; 86 reg = <0x1a000000 0x200>; 87 phy = <&phy1>; 88 phy-mode = "rgmii"; 89 90 status = "disabled"; 91 92 mdio { 93 #address-cells = <1>; 94 #size-cells = <0>; 95 phy1: ethernet-phy@0 { 96 reg = <0>; 97 }; 98 }; 99 }; 100 }; 101 102 spi0: spi@1f000000 { 103 compatible = "qca,ar7100-spi"; 104 reg = <0x1f000000 0x10>; 105 106 status = "disabled"; 107 108 #address-cells = <1>; 109 #size-cells = <0>; 110 }; 111 }; 112}; 113