xref: /openbmc/u-boot/arch/microblaze/include/asm/asm.h (revision be059e88)
1 /*
2  * (C) Copyright 2007 Michal Simek
3  *
4  * Michal  SIMEK <monstr@monstr.eu>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 /* FSL macros */
10 #define NGET(val, fslnum) \
11 	__asm__ __volatile__ ("nget %0, rfsl" #fslnum :"=r" (val));
12 
13 #define GET(val, fslnum) \
14 	__asm__ __volatile__ ("get %0, rfsl" #fslnum :"=r" (val));
15 
16 #define NCGET(val, fslnum) \
17 	__asm__ __volatile__ ("ncget %0, rfsl" #fslnum :"=r" (val));
18 
19 #define CGET(val, fslnum) \
20 	__asm__ __volatile__ ("cget %0, rfsl" #fslnum :"=r" (val));
21 
22 #define NPUT(val, fslnum) \
23 	__asm__ __volatile__ ("nput %0, rfsl" #fslnum ::"r" (val));
24 
25 #define PUT(val, fslnum) \
26 	__asm__ __volatile__ ("put %0, rfsl" #fslnum ::"r" (val));
27 
28 #define NCPUT(val, fslnum) \
29 	__asm__ __volatile__ ("ncput %0, rfsl" #fslnum ::"r" (val));
30 
31 #define CPUT(val, fslnum) \
32 	__asm__ __volatile__ ("cput %0, rfsl" #fslnum ::"r" (val));
33 
34 /* CPU dependent */
35 /* machine status register */
36 #define MFS(val, reg) \
37 	__asm__ __volatile__ ("mfs %0," #reg :"=r" (val));
38 
39 #define MTS(val, reg) \
40 	__asm__ __volatile__ ("mts " #reg ", %0"::"r" (val));
41 
42 /* get return address from interrupt */
43 #define R14(val) \
44 	__asm__ __volatile__ ("addi %0, r14, 0":"=r" (val));
45 
46 /* get return address from interrupt */
47 #define R17(val) \
48 	__asm__ __volatile__ ("addi %0, r17, 0" : "=r" (val));
49 
50 #define NOP	__asm__ __volatile__ ("nop");
51 
52 /* use machine status registe USE_MSR_REG */
53 #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR == 1
54 #define MSRSET(val) \
55 	__asm__ __volatile__ ("msrset r0," #val );
56 
57 #define MSRCLR(val) \
58 	__asm__ __volatile__ ("msrclr r0," #val );
59 
60 #else
61 #define MSRSET(val)						\
62 {								\
63 	register unsigned tmp;					\
64 	__asm__ __volatile__ ("					\
65 			mfs	%0, rmsr;			\
66 			ori	%0, %0, "#val";			\
67 			mts	rmsr, %0;			\
68 			nop;"					\
69 			: "=r" (tmp)				\
70 			: "d" (val)				\
71 			: "memory");				\
72 }
73 
74 #define MSRCLR(val)						\
75 {								\
76 	register unsigned tmp;					\
77 	__asm__ __volatile__ ("					\
78 			mfs	%0, rmsr;			\
79 			andi	%0, %0, ~"#val";		\
80 			mts	rmsr, %0;			\
81 			nop;"					\
82 			: "=r" (tmp)				\
83 			: "d" (val)				\
84 			: "memory");				\
85 }
86 #endif
87