1*02bb1fa0SÁlvaro Fernández Rojas /*
2*02bb1fa0SÁlvaro Fernández Rojas  * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
3*02bb1fa0SÁlvaro Fernández Rojas  *
4*02bb1fa0SÁlvaro Fernández Rojas  * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
5*02bb1fa0SÁlvaro Fernández Rojas  *
6*02bb1fa0SÁlvaro Fernández Rojas  * SPDX-License-Identifier:	GPL-2.0+
7*02bb1fa0SÁlvaro Fernández Rojas  */
8*02bb1fa0SÁlvaro Fernández Rojas 
9*02bb1fa0SÁlvaro Fernández Rojas #ifndef __DT_BINDINGS_RESET_BCM63268_H
10*02bb1fa0SÁlvaro Fernández Rojas #define __DT_BINDINGS_RESET_BCM63268_H
11*02bb1fa0SÁlvaro Fernández Rojas 
12*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_SPI	0
13*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_IPSEC	1
14*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_EPHY	2
15*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_SAR	3
16*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_ENETSW	4
17*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_USBS	5
18*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_USBH	6
19*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_PCM	7
20*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_PCIE_CORE	8
21*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_PCIE	9
22*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_PCIE_EXT	10
23*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_WLAN_SHIM	11
24*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_DDR_PHY	12
25*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_FAP0	13
26*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_WLAN_UBUS	14
27*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_DECT	15
28*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_FAP1	16
29*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_PCIE_HARD	17
30*02bb1fa0SÁlvaro Fernández Rojas #define BCM63268_RST_GPHY	18
31*02bb1fa0SÁlvaro Fernández Rojas 
32*02bb1fa0SÁlvaro Fernández Rojas #endif /* __DT_BINDINGS_RESET_BCM63268_H */
33