1*51cb23d4SPatrice Chotard /* 2*51cb23d4SPatrice Chotard * This header provides constants clk index STMicroelectronics 3*51cb23d4SPatrice Chotard * STiH410 SoC. 4*51cb23d4SPatrice Chotard */ 5*51cb23d4SPatrice Chotard #ifndef _DT_BINDINGS_CLK_STIH410 6*51cb23d4SPatrice Chotard #define _DT_BINDINGS_CLK_STIH410 7*51cb23d4SPatrice Chotard 8*51cb23d4SPatrice Chotard #include "stih407-clks.h" 9*51cb23d4SPatrice Chotard 10*51cb23d4SPatrice Chotard /* STiH410 introduces new clock outputs compared to STiH407 */ 11*51cb23d4SPatrice Chotard 12*51cb23d4SPatrice Chotard /* CLOCKGEN C0 */ 13*51cb23d4SPatrice Chotard #define CLK_TX_ICN_HADES 32 14*51cb23d4SPatrice Chotard #define CLK_RX_ICN_HADES 33 15*51cb23d4SPatrice Chotard #define CLK_ICN_REG_16 34 16*51cb23d4SPatrice Chotard #define CLK_PP_HADES 35 17*51cb23d4SPatrice Chotard #define CLK_CLUST_HADES 36 18*51cb23d4SPatrice Chotard #define CLK_HWPE_HADES 37 19*51cb23d4SPatrice Chotard #define CLK_FC_HADES 38 20*51cb23d4SPatrice Chotard 21*51cb23d4SPatrice Chotard /* CLOCKGEN D0 */ 22*51cb23d4SPatrice Chotard #define CLK_PCMR10_MASTER 4 23*51cb23d4SPatrice Chotard #define CLK_USB2_PHY 5 24*51cb23d4SPatrice Chotard 25*51cb23d4SPatrice Chotard #endif 26