1*edd15fcfSMarek Vasut /* 2*edd15fcfSMarek Vasut * Copyright (C) 2015 Renesas Electronics Corp. 3*edd15fcfSMarek Vasut * 4*edd15fcfSMarek Vasut * This program is free software; you can redistribute it and/or modify 5*edd15fcfSMarek Vasut * it under the terms of the GNU General Public License as published by 6*edd15fcfSMarek Vasut * the Free Software Foundation; either version 2 of the License, or 7*edd15fcfSMarek Vasut * (at your option) any later version. 8*edd15fcfSMarek Vasut */ 9*edd15fcfSMarek Vasut 10*edd15fcfSMarek Vasut #ifndef __DT_BINDINGS_CLOCK_R8A7791_CPG_MSSR_H__ 11*edd15fcfSMarek Vasut #define __DT_BINDINGS_CLOCK_R8A7791_CPG_MSSR_H__ 12*edd15fcfSMarek Vasut 13*edd15fcfSMarek Vasut #include <dt-bindings/clock/renesas-cpg-mssr.h> 14*edd15fcfSMarek Vasut 15*edd15fcfSMarek Vasut /* r8a7791 CPG Core Clocks */ 16*edd15fcfSMarek Vasut #define R8A7791_CLK_Z 0 17*edd15fcfSMarek Vasut #define R8A7791_CLK_ZG 1 18*edd15fcfSMarek Vasut #define R8A7791_CLK_ZTR 2 19*edd15fcfSMarek Vasut #define R8A7791_CLK_ZTRD2 3 20*edd15fcfSMarek Vasut #define R8A7791_CLK_ZT 4 21*edd15fcfSMarek Vasut #define R8A7791_CLK_ZX 5 22*edd15fcfSMarek Vasut #define R8A7791_CLK_ZS 6 23*edd15fcfSMarek Vasut #define R8A7791_CLK_HP 7 24*edd15fcfSMarek Vasut #define R8A7791_CLK_I 8 25*edd15fcfSMarek Vasut #define R8A7791_CLK_B 9 26*edd15fcfSMarek Vasut #define R8A7791_CLK_LB 10 27*edd15fcfSMarek Vasut #define R8A7791_CLK_P 11 28*edd15fcfSMarek Vasut #define R8A7791_CLK_CL 12 29*edd15fcfSMarek Vasut #define R8A7791_CLK_M2 13 30*edd15fcfSMarek Vasut #define R8A7791_CLK_ADSP 14 31*edd15fcfSMarek Vasut #define R8A7791_CLK_ZB3 15 32*edd15fcfSMarek Vasut #define R8A7791_CLK_ZB3D2 16 33*edd15fcfSMarek Vasut #define R8A7791_CLK_DDR 17 34*edd15fcfSMarek Vasut #define R8A7791_CLK_SDH 18 35*edd15fcfSMarek Vasut #define R8A7791_CLK_SD0 19 36*edd15fcfSMarek Vasut #define R8A7791_CLK_SD2 20 37*edd15fcfSMarek Vasut #define R8A7791_CLK_SD3 21 38*edd15fcfSMarek Vasut #define R8A7791_CLK_MMC0 22 39*edd15fcfSMarek Vasut #define R8A7791_CLK_MP 23 40*edd15fcfSMarek Vasut #define R8A7791_CLK_SSP 24 41*edd15fcfSMarek Vasut #define R8A7791_CLK_SSPRS 25 42*edd15fcfSMarek Vasut #define R8A7791_CLK_QSPI 26 43*edd15fcfSMarek Vasut #define R8A7791_CLK_CP 27 44*edd15fcfSMarek Vasut #define R8A7791_CLK_RCAN 28 45*edd15fcfSMarek Vasut #define R8A7791_CLK_R 29 46*edd15fcfSMarek Vasut #define R8A7791_CLK_OSC 30 47*edd15fcfSMarek Vasut 48*edd15fcfSMarek Vasut #endif /* __DT_BINDINGS_CLOCK_R8A7791_CPG_MSSR_H__ */ 49