1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2a0e79083SPurna Chandra Mandal /* 3a0e79083SPurna Chandra Mandal * (c) 2015 Purna Chandra Mandal <purna.mandal@microchip.com> 4a0e79083SPurna Chandra Mandal * 5a0e79083SPurna Chandra Mandal */ 6a0e79083SPurna Chandra Mandal 7a0e79083SPurna Chandra Mandal #ifndef __CLK_MICROCHIP_PIC32 8a0e79083SPurna Chandra Mandal #define __CLK_MICROCHIP_PIC32 9a0e79083SPurna Chandra Mandal 10a0e79083SPurna Chandra Mandal /* clock output indices */ 11a0e79083SPurna Chandra Mandal #define BASECLK 0 12a0e79083SPurna Chandra Mandal #define PLLCLK 1 13a0e79083SPurna Chandra Mandal #define MPLL 2 14a0e79083SPurna Chandra Mandal #define SYSCLK 3 15a0e79083SPurna Chandra Mandal #define PB1CLK 4 16a0e79083SPurna Chandra Mandal #define PB2CLK 5 17a0e79083SPurna Chandra Mandal #define PB3CLK 6 18a0e79083SPurna Chandra Mandal #define PB4CLK 7 19a0e79083SPurna Chandra Mandal #define PB5CLK 8 20a0e79083SPurna Chandra Mandal #define PB6CLK 9 21a0e79083SPurna Chandra Mandal #define PB7CLK 10 22a0e79083SPurna Chandra Mandal #define REF1CLK 11 23a0e79083SPurna Chandra Mandal #define REF2CLK 12 24a0e79083SPurna Chandra Mandal #define REF3CLK 13 25a0e79083SPurna Chandra Mandal #define REF4CLK 14 26a0e79083SPurna Chandra Mandal #define REF5CLK 15 27a0e79083SPurna Chandra Mandal 28a0e79083SPurna Chandra Mandal #endif /* __CLK_MICROCHIP_PIC32 */ 29