xref: /openbmc/u-boot/arch/microblaze/cpu/timer.c (revision 441cac10)
1 /*
2  * (C) Copyright 2007 Michal Simek
3  *
4  * Michal  SIMEK <monstr@monstr.eu>
5  *
6  * See file CREDITS for list of people who contributed to this
7  * project.
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; either version 2 of
12  * the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22  * MA 02111-1307 USA
23  */
24 
25 #include <common.h>
26 #include <asm/microblaze_timer.h>
27 #include <asm/microblaze_intc.h>
28 
29 volatile int timestamp = 0;
30 
31 void reset_timer (void)
32 {
33 	timestamp = 0;
34 }
35 
36 #ifdef CONFIG_SYS_TIMER_0
37 ulong get_timer (ulong base)
38 {
39 	return (timestamp - base);
40 }
41 #else
42 ulong get_timer (ulong base)
43 {
44 	return (timestamp++ - base);
45 }
46 #endif
47 
48 void set_timer (ulong t)
49 {
50 	timestamp = t;
51 }
52 
53 #ifdef CONFIG_SYS_INTC_0
54 #ifdef CONFIG_SYS_TIMER_0
55 microblaze_timer_t *tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR);
56 
57 void timer_isr (void *arg)
58 {
59 	timestamp++;
60 	tmr->control = tmr->control | TIMER_INTERRUPT;
61 }
62 
63 int timer_init (void)
64 {
65 	tmr->loadreg = CONFIG_SYS_TIMER_0_PRELOAD;
66 	tmr->control = TIMER_INTERRUPT | TIMER_RESET;
67 	tmr->control =
68 	    TIMER_ENABLE | TIMER_ENABLE_INTR | TIMER_RELOAD | TIMER_DOWN_COUNT;
69 	reset_timer ();
70 	install_interrupt_handler (CONFIG_SYS_TIMER_0_IRQ, timer_isr, (void *)tmr);
71 	return 0;
72 }
73 #endif
74 #endif
75