xref: /openbmc/u-boot/arch/microblaze/cpu/irq.S (revision 0df01fd3)
1/*
2 * (C) Copyright 2007 Michal Simek
3 *
4 * Michal  SIMEK <monstr@monstr.eu>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <config.h>
26#include <asm/asm.h>
27	.text
28	.global _interrupt_handler
29_interrupt_handler:
30	swi	r2, r1, -4
31	swi	r3, r1, -8
32	swi	r4, r1, -12
33	swi	r5, r1, -16
34	swi	r6, r1, -20
35	swi	r7, r1, -24
36	swi	r8, r1, -28
37	swi	r9, r1, -32
38	swi	r10, r1, -36
39	swi	r11, r1, -40
40	swi	r12, r1, -44
41	swi	r13, r1, -48
42	swi	r14, r1, -52
43	swi	r15, r1, -56
44	swi	r16, r1, -60
45	swi	r17, r1, -64
46	swi	r18, r1, -68
47	swi	r19, r1, -72
48	swi	r20, r1, -76
49	swi	r21, r1, -80
50	swi	r22, r1, -84
51	swi	r23, r1, -88
52	swi	r24, r1, -92
53	swi	r25, r1, -96
54	swi	r26, r1, -100
55	swi	r27, r1, -104
56	swi	r28, r1, -108
57	swi	r29, r1, -112
58	swi	r30, r1, -116
59	swi	r31, r1, -120
60	addik	r1, r1, -124
61	brlid	r15, interrupt_handler
62	nop
63	nop
64	addik	r1, r1, 124
65	lwi	r31, r1, -120
66	lwi	r30, r1, -116
67	lwi	r29, r1, -112
68	lwi	r28, r1, -108
69	lwi	r27, r1, -104
70	lwi	r26, r1, -100
71	lwi	r25, r1, -96
72	lwi	r24, r1, -92
73	lwi	r23, r1, -88
74	lwi	r22, r1, -84
75	lwi	r21, r1, -80
76	lwi	r20, r1, -76
77	lwi	r19, r1, -72
78	lwi	r18, r1, -68
79	lwi	r17, r1, -64
80	lwi	r16, r1, -60
81	lwi	r15, r1, -56
82	lwi	r14, r1, -52
83	lwi	r13, r1, -48
84	lwi	r12, r1, -44
85	lwi	r11, r1, -40
86	lwi	r10, r1, -36
87	lwi	r9, r1, -32
88	lwi	r8, r1, -28
89	lwi	r7, r1, -24
90	lwi	r6, r1, -20
91	lwi	r5, r1, -16
92	lwi	r4, r1, -12
93	lwi	r3, r1, -8
94	lwi	r2, r1, -4
95
96	/* enable_interrupt */
97#ifdef XILINX_USE_MSR_INSTR
98	msrset	r0, 2
99#else
100	/* FIXME unstable in stressed mode - two irqs */
101	nop
102	addi	r1, r1, -4
103	swi	r12, r1, 0
104	mfs	r12, rmsr
105	ori	r12, r12, 2
106	mts	rmsr, r12
107	lwi	r12, r1, 0
108	addi	r1, r1, 4
109	nop
110#endif
111	bra	r14
112	nop
113	nop
114	.size _interrupt_handler,.-_interrupt_handler
115