1 /* 2 * mcf5272.h -- Definitions for Motorola Coldfire 5272 3 * 4 * Based on mcf5272sim.h of uCLinux distribution: 5 * (C) Copyright 1999, Greg Ungerer (gerg@snapgear.com) 6 * (C) Copyright 2000, Lineo Inc. (www.lineo.com) 7 * 8 * See file CREDITS for list of people who contributed to this 9 * project. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of 14 * the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * MA 02111-1307 USA 25 */ 26 27 #ifndef mcf5272_h 28 #define mcf5272_h 29 /****************************************************************************/ 30 31 /* 32 * Size of internal RAM 33 */ 34 35 #define INT_RAM_SIZE 4096 36 37 #define GPIO_PACNT_PA15MSK (0xC0000000) 38 #define GPIO_PACNT_DGNT1 (0x40000000) 39 #define GPIO_PACNT_PA14MSK (0x30000000) 40 #define GPIO_PACNT_DREQ1 (0x10000000) 41 #define GPIO_PACNT_PA13MSK (0x0C000000) 42 #define GPIO_PACNT_DFSC3 (0x04000000) 43 #define GPIO_PACNT_PA12MSK (0x03000000) 44 #define GPIO_PACNT_DFSC2 (0x01000000) 45 #define GPIO_PACNT_PA11MSK (0x00C00000) 46 #define GPIO_PACNT_QSPI_CS1 (0x00800000) 47 #define GPIO_PACNT_PA10MSK (0x00300000) 48 #define GPIO_PACNT_DREQ0 (0x00100000) 49 #define GPIO_PACNT_PA9MSK (0x000C0000) 50 #define GPIO_PACNT_DGNT0 (0x00040000) 51 #define GPIO_PACNT_PA8MSK (0x00030000) 52 #define GPIO_PACNT_FSC0 (0x00010000) 53 #define GPIO_PACNT_FSR0 (0x00010000) 54 #define GPIO_PACNT_PA7MSK (0x0000C000) 55 #define GPIO_PACNT_DOUT3 (0x00008000) 56 #define GPIO_PACNT_QSPI_CS3 (0x00004000) 57 #define GPIO_PACNT_PA6MSK (0x00003000) 58 #define GPIO_PACNT_USB_RXD (0x00001000) 59 #define GPIO_PACNT_PA5MSK (0x00000C00) 60 #define GPIO_PACNT_USB_TXEN (0x00000400) 61 #define GPIO_PACNT_PA4MSK (0x00000300) 62 #define GPIO_PACNT_USB_SUSP (0x00000100) 63 #define GPIO_PACNT_PA3MSK (0x000000C0) 64 #define GPIO_PACNT_USB_TN (0x00000040) 65 #define GPIO_PACNT_PA2MSK (0x00000030) 66 #define GPIO_PACNT_USB_RN (0x00000010) 67 #define GPIO_PACNT_PA1MSK (0x0000000C) 68 #define GPIO_PACNT_USB_RP (0x00000004) 69 #define GPIO_PACNT_PA0MSK (0x00000003) 70 #define GPIO_PACNT_USB_TP (0x00000001) 71 72 #define GPIO_PBCNT_PB15MSK (0xC0000000) 73 #define GPIO_PBCNT_E_MDC (0x40000000) 74 #define GPIO_PBCNT_PB14MSK (0x30000000) 75 #define GPIO_PBCNT_E_RXER (0x10000000) 76 #define GPIO_PBCNT_PB13MSK (0x0C000000) 77 #define GPIO_PBCNT_E_RXD1 (0x04000000) 78 #define GPIO_PBCNT_PB12MSK (0x03000000) 79 #define GPIO_PBCNT_E_RXD2 (0x01000000) 80 #define GPIO_PBCNT_PB11MSK (0x00C00000) 81 #define GPIO_PBCNT_E_RXD3 (0x00400000) 82 #define GPIO_PBCNT_PB10MSK (0x00300000) 83 #define GPIO_PBCNT_E_TXD1 (0x00100000) 84 #define GPIO_PBCNT_PB9MSK (0x000C0000) 85 #define GPIO_PBCNT_E_TXD2 (0x00040000) 86 #define GPIO_PBCNT_PB8MSK (0x00030000) 87 #define GPIO_PBCNT_E_TXD3 (0x00010000) 88 #define GPIO_PBCNT_PB7MSK (0x0000C000) 89 #define GPIO_PBCNT_TOUT0 (0x00004000) 90 #define GPIO_PBCNT_PB6MSK (0x00003000) 91 #define GPIO_PBCNT_TA (0x00001000) 92 #define GPIO_PBCNT_PB4MSK (0x00000300) 93 #define GPIO_PBCNT_URT0_CLK (0x00000100) 94 #define GPIO_PBCNT_PB3MSK (0x000000C0) 95 #define GPIO_PBCNT_URT0_RTS (0x00000040) 96 #define GPIO_PBCNT_PB2MSK (0x00000030) 97 #define GPIO_PBCNT_URT0_CTS (0x00000010) 98 #define GPIO_PBCNT_PB1MSK (0x0000000C) 99 #define GPIO_PBCNT_URT0_RXD (0x00000004) 100 #define GPIO_PBCNT_URT0_TIN2 (0x00000004) 101 #define GPIO_PBCNT_PB0MSK (0x00000003) 102 #define GPIO_PBCNT_URT0_TXD (0x00000001) 103 104 #define GPIO_PDCNT_PD7MSK (0x0000C000) 105 #define GPIO_PDCNT_TIN1 (0x00008000) 106 #define GPIO_PDCNT_PWM_OUT2 (0x00004000) 107 #define GPIO_PDCNT_PD6MSK (0x00003000) 108 #define GPIO_PDCNT_TOUT1 (0x00002000) 109 #define GPIO_PDCNT_PWM_OUT1 (0x00001000) 110 #define GPIO_PDCNT_PD5MSK (0x00000C00) 111 #define GPIO_PDCNT_INT4 (0x00000C00) 112 #define GPIO_PDCNT_DIN3 (0x00000800) 113 #define GPIO_PDCNT_PD4MSK (0x00000300) 114 #define GPIO_PDCNT_URT1_TXD (0x00000200) 115 #define GPIO_PDCNT_DOUT0 (0x00000100) 116 #define GPIO_PDCNT_PD3MSK (0x000000C0) 117 #define GPIO_PDCNT_INT5 (0x000000C0) 118 #define GPIO_PDCNT_URT1_RTS (0x00000080) 119 #define GPIO_PDCNT_PD2MSK (0x00000030) 120 #define GPIO_PDCNT_QSPI_CS2 (0x00000030) 121 #define GPIO_PDCNT_URT1_CTS (0x00000020) 122 #define GPIO_PDCNT_PD1MSK (0x0000000C) 123 #define GPIO_PDCNT_URT1_RXD (0x00000008) 124 #define GPIO_PDCNT_URT1_TIN3 (0x00000008) 125 #define GPIO_PDCNT_DIN0 (0x00000004) 126 #define GPIO_PDCNT_PD0MSK (0x00000003) 127 #define GPIO_PDCNT_URT1_CLK (0x00000002) 128 #define GPIO_PDCNT_DCL0 (0x00000001) 129 130 #define INT_RSVD0 (0) 131 #define INT_INT1 (1) 132 #define INT_INT2 (2) 133 #define INT_INT3 (3) 134 #define INT_INT4 (4) 135 #define INT_TMR0 (5) 136 #define INT_TMR1 (6) 137 #define INT_TMR2 (7) 138 #define INT_TMR3 (8) 139 #define INT_UART1 (9) 140 #define INT_UART2 (10) 141 #define INT_PLIP (11) 142 #define INT_PLIA (12) 143 #define INT_USB0 (13) 144 #define INT_USB1 (14) 145 #define INT_USB2 (15) 146 #define INT_USB3 (16) 147 #define INT_USB4 (17) 148 #define INT_USB5 (18) 149 #define INT_USB6 (19) 150 #define INT_USB7 (20) 151 #define INT_DMA (21) 152 #define INT_ERX (22) 153 #define INT_ETX (23) 154 #define INT_ENTC (24) 155 #define INT_QSPI (25) 156 #define INT_INT5 (26) 157 #define INT_INT6 (27) 158 #define INT_SWTO (28) 159 160 #define INT_ICR1_TMR0MASK (0x000F000) 161 #define INT_ICR1_TMR0PI (0x0008000) 162 #define INT_ICR1_TMR0IPL(x) (((x)&0x7)<<12) 163 #define INT_ICR1_TMR1MASK (0x0000F00) 164 #define INT_ICR1_TMR1PI (0x0000800) 165 #define INT_ICR1_TMR1IPL(x) (((x)&0x7)<<8) 166 #define INT_ICR1_TMR2MASK (0x00000F0) 167 #define INT_ICR1_TMR2PI (0x0000080) 168 #define INT_ICR1_TMR2IPL(x) (((x)&0x7)<<4) 169 #define INT_ICR1_TMR3MASK (0x000000F) 170 #define INT_ICR1_TMR3PI (0x0000008) 171 #define INT_ICR1_TMR3IPL(x) (((x)&0x7)) 172 173 #define INT_ISR_INT31 (0x80000000) 174 #define INT_ISR_INT30 (0x40000000) 175 #define INT_ISR_INT29 (0x20000000) 176 #define INT_ISR_INT28 (0x10000000) 177 #define INT_ISR_INT27 (0x08000000) 178 #define INT_ISR_INT26 (0x04000000) 179 #define INT_ISR_INT25 (0x02000000) 180 #define INT_ISR_INT24 (0x01000000) 181 #define INT_ISR_INT23 (0x00800000) 182 #define INT_ISR_INT22 (0x00400000) 183 #define INT_ISR_INT21 (0x00200000) 184 #define INT_ISR_INT20 (0x00100000) 185 #define INT_ISR_INT19 (0x00080000) 186 #define INT_ISR_INT18 (0x00040000) 187 #define INT_ISR_INT17 (0x00020000) 188 #define INT_ISR_INT16 (0x00010000) 189 #define INT_ISR_INT15 (0x00008000) 190 #define INT_ISR_INT14 (0x00004000) 191 #define INT_ISR_INT13 (0x00002000) 192 #define INT_ISR_INT12 (0x00001000) 193 #define INT_ISR_INT11 (0x00000800) 194 #define INT_ISR_INT10 (0x00000400) 195 #define INT_ISR_INT9 (0x00000200) 196 #define INT_ISR_INT8 (0x00000100) 197 #define INT_ISR_INT7 (0x00000080) 198 #define INT_ISR_INT6 (0x00000040) 199 #define INT_ISR_INT5 (0x00000020) 200 #define INT_ISR_INT4 (0x00000010) 201 #define INT_ISR_INT3 (0x00000008) 202 #define INT_ISR_INT2 (0x00000004) 203 #define INT_ISR_INT1 (0x00000002) 204 #define INT_ISR_INT0 (0x00000001) 205 206 #endif /* mcf5272_h */ 207