1 /* 2 * IO header file 3 * 4 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. 5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #ifndef __ASM_M68K_IO_H__ 27 #define __ASM_M68K_IO_H__ 28 29 #include <asm/byteorder.h> 30 31 #ifndef _IO_BASE 32 #define _IO_BASE 0 33 #endif 34 35 #define __raw_readb(addr) (*(volatile u8 *)(addr)) 36 #define __raw_readw(addr) (*(volatile u16 *)(addr)) 37 #define __raw_readl(addr) (*(volatile u32 *)(addr)) 38 39 #define __raw_writeb(b,addr) ((*(volatile u8 *) (addr)) = (b)) 40 #define __raw_writew(w,addr) ((*(volatile u16 *) (addr)) = (w)) 41 #define __raw_writel(l,addr) ((*(volatile u32 *) (addr)) = (l)) 42 43 #define readb(addr) in_8((volatile u8 *)(addr)) 44 #define writeb(b,addr) out_8((volatile u8 *)(addr), (b)) 45 #if !defined(__BIG_ENDIAN) 46 #define readw(addr) (*(volatile u16 *) (addr)) 47 #define readl(addr) (*(volatile u32 *) (addr)) 48 #define writew(b,addr) ((*(volatile u16 *) (addr)) = (b)) 49 #define writel(b,addr) ((*(volatile u32 *) (addr)) = (b)) 50 #else 51 #define readw(addr) in_le16((volatile u16 *)(addr)) 52 #define readl(addr) in_le32((volatile u32 *)(addr)) 53 #define writew(b,addr) out_le16((volatile u16 *)(addr),(b)) 54 #define writel(b,addr) out_le32((volatile u32 *)(addr),(b)) 55 #endif 56 57 /* 58 * The insw/outsw/insl/outsl macros don't do byte-swapping. 59 * They are only used in practice for transferring buffers which 60 * are arrays of bytes, and byte-swapping is not appropriate in 61 * that case. - paulus 62 */ 63 #define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns)) 64 #define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns)) 65 #define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) 66 #define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) 67 #define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) 68 #define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) 69 70 #define inb(port) in_8((u8 *)((port)+_IO_BASE)) 71 #define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) 72 #if !defined(__BIG_ENDIAN) 73 #define inw(port) in_be16((u16 *)((port)+_IO_BASE)) 74 #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val)) 75 #define inl(port) in_be32((u32 *)((port)+_IO_BASE)) 76 #define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val)) 77 #else 78 #define inw(port) in_le16((u16 *)((port)+_IO_BASE)) 79 #define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val)) 80 #define inl(port) in_le32((u32 *)((port)+_IO_BASE)) 81 #define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val)) 82 #endif 83 84 #define mb() __asm__ __volatile__ ("" : : : "memory") 85 86 extern inline void _insb(volatile u8 * port, void *buf, int ns) 87 { 88 u8 *data = (u8 *) buf; 89 while (ns--) 90 *data++ = *port; 91 } 92 93 extern inline void _outsb(volatile u8 * port, const void *buf, int ns) 94 { 95 u8 *data = (u8 *) buf; 96 while (ns--) 97 *port = *data++; 98 } 99 100 extern inline void _insw(volatile u16 * port, void *buf, int ns) 101 { 102 u16 *data = (u16 *) buf; 103 while (ns--) 104 *data++ = __sw16(*port); 105 } 106 107 extern inline void _outsw(volatile u16 * port, const void *buf, int ns) 108 { 109 u16 *data = (u16 *) buf; 110 while (ns--) { 111 *port = __sw16(*data); 112 data++; 113 } 114 } 115 116 extern inline void _insl(volatile u32 * port, void *buf, int nl) 117 { 118 u32 *data = (u32 *) buf; 119 while (nl--) 120 *data++ = __sw32(*port); 121 } 122 123 extern inline void _outsl(volatile u32 * port, const void *buf, int nl) 124 { 125 u32 *data = (u32 *) buf; 126 while (nl--) { 127 *port = __sw32(*data); 128 data++; 129 } 130 } 131 132 extern inline void _insw_ns(volatile u16 * port, void *buf, int ns) 133 { 134 u16 *data = (u16 *) buf; 135 while (ns--) 136 *data++ = *port; 137 } 138 139 extern inline void _outsw_ns(volatile u16 * port, const void *buf, int ns) 140 { 141 u16 *data = (u16 *) buf; 142 while (ns--) { 143 *port = *data++; 144 } 145 } 146 147 extern inline void _insl_ns(volatile u32 * port, void *buf, int nl) 148 { 149 u32 *data = (u32 *) buf; 150 while (nl--) 151 *data++ = *port; 152 } 153 154 extern inline void _outsl_ns(volatile u32 * port, const void *buf, int nl) 155 { 156 u32 *data = (u32 *) buf; 157 while (nl--) { 158 *port = *data; 159 data++; 160 } 161 } 162 163 /* 164 * The *_ns versions below don't do byte-swapping. 165 * Neither do the standard versions now, these are just here 166 * for older code. 167 */ 168 #define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) 169 #define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) 170 #define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) 171 #define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) 172 173 #define IO_SPACE_LIMIT ~0 174 175 /* 176 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. 177 */ 178 extern inline int in_8(volatile u8 * addr) 179 { 180 return (int)*addr; 181 } 182 183 extern inline void out_8(volatile u8 * addr, int val) 184 { 185 *addr = (u8) val; 186 } 187 188 extern inline int in_le16(volatile u16 * addr) 189 { 190 return __sw16(*addr); 191 } 192 193 extern inline int in_be16(volatile u16 * addr) 194 { 195 return (*addr & 0xFFFF); 196 } 197 198 extern inline void out_le16(volatile u16 * addr, int val) 199 { 200 *addr = __sw16(val); 201 } 202 203 extern inline void out_be16(volatile u16 * addr, int val) 204 { 205 *addr = (u16) val; 206 } 207 208 extern inline unsigned in_le32(volatile u32 * addr) 209 { 210 return __sw32(*addr); 211 } 212 213 extern inline unsigned in_be32(volatile u32 * addr) 214 { 215 return (*addr); 216 } 217 218 extern inline void out_le32(volatile unsigned *addr, int val) 219 { 220 *addr = __sw32(val); 221 } 222 223 extern inline void out_be32(volatile unsigned *addr, int val) 224 { 225 *addr = val; 226 } 227 228 /* Clear and set bits in one shot. These macros can be used to clear and 229 * set multiple bits in a register using a single call. These macros can 230 * also be used to set a multiple-bit bit pattern using a mask, by 231 * specifying the mask in the 'clear' parameter and the new bit pattern 232 * in the 'set' parameter. 233 */ 234 235 #define clrbits(type, addr, clear) \ 236 out_##type((addr), in_##type(addr) & ~(clear)) 237 238 #define setbits(type, addr, set) \ 239 out_##type((addr), in_##type(addr) | (set)) 240 241 #define clrsetbits(type, addr, clear, set) \ 242 out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) 243 244 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear) 245 #define setbits_be32(addr, set) setbits(be32, addr, set) 246 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) 247 248 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear) 249 #define setbits_le32(addr, set) setbits(le32, addr, set) 250 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) 251 252 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) 253 #define setbits_be16(addr, set) setbits(be16, addr, set) 254 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) 255 256 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear) 257 #define setbits_le16(addr, set) setbits(le16, addr, set) 258 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) 259 260 #define clrbits_8(addr, clear) clrbits(8, addr, clear) 261 #define setbits_8(addr, set) setbits(8, addr, set) 262 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) 263 264 static inline void sync(void) 265 { 266 /* This sync function is for PowerPC or other architecture instruction 267 * ColdFire does not have this instruction. Dummy function, added for 268 * compatibility (CFI driver) 269 */ 270 } 271 272 /* 273 * Given a physical address and a length, return a virtual address 274 * that can be used to access the memory range with the caching 275 * properties specified by "flags". 276 */ 277 #define MAP_NOCACHE (0) 278 #define MAP_WRCOMBINE (0) 279 #define MAP_WRBACK (0) 280 #define MAP_WRTHROUGH (0) 281 282 static inline void *map_physmem(phys_addr_t paddr, unsigned long len, 283 unsigned long flags) 284 { 285 return (void *)paddr; 286 } 287 288 /* 289 * Take down a mapping set up by map_physmem(). 290 */ 291 static inline void unmap_physmem(void *vaddr, unsigned long flags) 292 { 293 294 } 295 296 static inline phys_addr_t virt_to_phys(void * vaddr) 297 { 298 return (phys_addr_t)(vaddr); 299 } 300 301 #endif /* __ASM_M68K_IO_H__ */ 302