xref: /openbmc/u-boot/arch/m68k/include/asm/io.h (revision 274bced8)
1 /*
2  * IO header file
3  *
4  * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
5  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __ASM_M68K_IO_H__
11 #define __ASM_M68K_IO_H__
12 
13 #include <asm/byteorder.h>
14 
15 #ifndef _IO_BASE
16 #define _IO_BASE 0
17 #endif
18 
19 #define __raw_readb(addr) (*(volatile u8 *)(addr))
20 #define __raw_readw(addr) (*(volatile u16 *)(addr))
21 #define __raw_readl(addr) (*(volatile u32 *)(addr))
22 
23 #define __raw_writeb(b,addr) ((*(volatile u8 *) (addr)) = (b))
24 #define __raw_writew(w,addr) ((*(volatile u16 *) (addr)) = (w))
25 #define __raw_writel(l,addr) ((*(volatile u32 *) (addr)) = (l))
26 
27 #define readb(addr)		in_8((volatile u8 *)(addr))
28 #define writeb(b,addr)		out_8((volatile u8 *)(addr), (b))
29 #if !defined(__BIG_ENDIAN)
30 #define readw(addr)		(*(volatile u16 *) (addr))
31 #define readl(addr)		(*(volatile u32 *) (addr))
32 #define writew(b,addr)		((*(volatile u16 *) (addr)) = (b))
33 #define writel(b,addr)		((*(volatile u32 *) (addr)) = (b))
34 #else
35 #define readw(addr)		in_be16((volatile u16 *)(addr))
36 #define readl(addr)		in_be32((volatile u32 *)(addr))
37 #define writew(b,addr)		out_be16((volatile u16 *)(addr),(b))
38 #define writel(b,addr)		out_be32((volatile u32 *)(addr),(b))
39 #endif
40 
41 /*
42  * The insw/outsw/insl/outsl macros don't do byte-swapping.
43  * They are only used in practice for transferring buffers which
44  * are arrays of bytes, and byte-swapping is not appropriate in
45  * that case.  - paulus
46  */
47 #define insb(port, buf, ns)	_insb((u8 *)((port)+_IO_BASE), (buf), (ns))
48 #define outsb(port, buf, ns)	_outsb((u8 *)((port)+_IO_BASE), (buf), (ns))
49 #define insw(port, buf, ns)	_insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
50 #define outsw(port, buf, ns)	_outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
51 #define insl(port, buf, nl)	_insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
52 #define outsl(port, buf, nl)	_outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
53 
54 #define inb(port)		in_8((u8 *)((port)+_IO_BASE))
55 #define outb(val, port)		out_8((u8 *)((port)+_IO_BASE), (val))
56 #if !defined(__BIG_ENDIAN)
57 #define inw(port)		in_be16((u16 *)((port)+_IO_BASE))
58 #define outw(val, port)		out_be16((u16 *)((port)+_IO_BASE), (val))
59 #define inl(port)		in_be32((u32 *)((port)+_IO_BASE))
60 #define outl(val, port)		out_be32((u32 *)((port)+_IO_BASE), (val))
61 #else
62 #define inw(port)		in_le16((u16 *)((port)+_IO_BASE))
63 #define outw(val, port)		out_le16((u16 *)((port)+_IO_BASE), (val))
64 #define inl(port)		in_le32((u32 *)((port)+_IO_BASE))
65 #define outl(val, port)		out_le32((u32 *)((port)+_IO_BASE), (val))
66 #endif
67 
68 #define mb() __asm__ __volatile__ ("" : : : "memory")
69 
70 static inline void _insb(volatile u8 * port, void *buf, int ns)
71 {
72 	u8 *data = (u8 *) buf;
73 	while (ns--)
74 		*data++ = *port;
75 }
76 
77 static inline void _outsb(volatile u8 * port, const void *buf, int ns)
78 {
79 	u8 *data = (u8 *) buf;
80 	while (ns--)
81 		*port = *data++;
82 }
83 
84 static inline void _insw(volatile u16 * port, void *buf, int ns)
85 {
86 	u16 *data = (u16 *) buf;
87 	while (ns--)
88 		*data++ = __sw16(*port);
89 }
90 
91 static inline void _outsw(volatile u16 * port, const void *buf, int ns)
92 {
93 	u16 *data = (u16 *) buf;
94 	while (ns--) {
95 		*port = __sw16(*data);
96 		data++;
97 	}
98 }
99 
100 static inline void _insl(volatile u32 * port, void *buf, int nl)
101 {
102 	u32 *data = (u32 *) buf;
103 	while (nl--)
104 		*data++ = __sw32(*port);
105 }
106 
107 static inline void _outsl(volatile u32 * port, const void *buf, int nl)
108 {
109 	u32 *data = (u32 *) buf;
110 	while (nl--) {
111 		*port = __sw32(*data);
112 		data++;
113 	}
114 }
115 
116 static inline void _insw_ns(volatile u16 * port, void *buf, int ns)
117 {
118 	u16 *data = (u16 *) buf;
119 	while (ns--)
120 		*data++ = *port;
121 }
122 
123 static inline void _outsw_ns(volatile u16 * port, const void *buf, int ns)
124 {
125 	u16 *data = (u16 *) buf;
126 	while (ns--) {
127 		*port = *data++;
128 	}
129 }
130 
131 static inline void _insl_ns(volatile u32 * port, void *buf, int nl)
132 {
133 	u32 *data = (u32 *) buf;
134 	while (nl--)
135 		*data++ = *port;
136 }
137 
138 static inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)
139 {
140 	u32 *data = (u32 *) buf;
141 	while (nl--) {
142 		*port = *data;
143 		data++;
144 	}
145 }
146 
147 /*
148  * The *_ns versions below don't do byte-swapping.
149  * Neither do the standard versions now, these are just here
150  * for older code.
151  */
152 #define insw_ns(port, buf, ns)	_insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
153 #define outsw_ns(port, buf, ns)	_outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
154 #define insl_ns(port, buf, nl)	_insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
155 #define outsl_ns(port, buf, nl)	_outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
156 
157 #define IO_SPACE_LIMIT ~0
158 
159 /*
160  * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
161  */
162 static inline int in_8(volatile u8 * addr)
163 {
164 	return (int)*addr;
165 }
166 
167 static inline void out_8(volatile u8 * addr, int val)
168 {
169 	*addr = (u8) val;
170 }
171 
172 static inline int in_le16(volatile u16 * addr)
173 {
174 	return __sw16(*addr);
175 }
176 
177 static inline int in_be16(volatile u16 * addr)
178 {
179 	return (*addr & 0xFFFF);
180 }
181 
182 static inline void out_le16(volatile u16 * addr, int val)
183 {
184 	*addr = __sw16(val);
185 }
186 
187 static inline void out_be16(volatile u16 * addr, int val)
188 {
189 	*addr = (u16) val;
190 }
191 
192 static inline unsigned in_le32(volatile u32 * addr)
193 {
194 	return __sw32(*addr);
195 }
196 
197 static inline unsigned in_be32(volatile u32 * addr)
198 {
199 	return (*addr);
200 }
201 
202 static inline void out_le32(volatile unsigned *addr, int val)
203 {
204 	*addr = __sw32(val);
205 }
206 
207 static inline void out_be32(volatile unsigned *addr, int val)
208 {
209 	*addr = val;
210 }
211 
212 /* Clear and set bits in one shot. These macros can be used to clear and
213  * set multiple bits in a register using a single call. These macros can
214  * also be used to set a multiple-bit bit pattern using a mask, by
215  * specifying the mask in the 'clear' parameter and the new bit pattern
216  * in the 'set' parameter.
217  */
218 
219 #define clrbits(type, addr, clear) \
220 	out_##type((addr), in_##type(addr) & ~(clear))
221 
222 #define setbits(type, addr, set) \
223 	out_##type((addr), in_##type(addr) | (set))
224 
225 #define clrsetbits(type, addr, clear, set) \
226 	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
227 
228 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
229 #define setbits_be32(addr, set) setbits(be32, addr, set)
230 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
231 
232 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
233 #define setbits_le32(addr, set) setbits(le32, addr, set)
234 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
235 
236 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
237 #define setbits_be16(addr, set) setbits(be16, addr, set)
238 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
239 
240 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
241 #define setbits_le16(addr, set) setbits(le16, addr, set)
242 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
243 
244 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
245 #define setbits_8(addr, set) setbits(8, addr, set)
246 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
247 
248 static inline void sync(void)
249 {
250 	/* This sync function is for PowerPC or other architecture instruction
251 	 * ColdFire does not have this instruction. Dummy function, added for
252 	 * compatibility (CFI driver)
253 	 */
254 }
255 
256 /*
257  * Given a physical address and a length, return a virtual address
258  * that can be used to access the memory range with the caching
259  * properties specified by "flags".
260  */
261 #define MAP_NOCACHE	(0)
262 #define MAP_WRCOMBINE	(0)
263 #define MAP_WRBACK	(0)
264 #define MAP_WRTHROUGH	(0)
265 
266 static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
267 				unsigned long flags)
268 {
269 	return (void *)paddr;
270 }
271 
272 /*
273  * Take down a mapping set up by map_physmem().
274  */
275 static inline void unmap_physmem(void *vaddr, unsigned long flags)
276 {
277 
278 }
279 
280 static inline phys_addr_t virt_to_phys(void * vaddr)
281 {
282 	return (phys_addr_t)(vaddr);
283 }
284 
285 #endif				/* __ASM_M68K_IO_H__ */
286