1 /* 2 * MCF5282 Internal Memory Map 3 * 4 * Copyright (c) 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #ifndef __IMMAP_5282__ 26 #define __IMMAP_5282__ 27 28 #define MMAP_SCM (CONFIG_SYS_MBAR + 0x00000000) 29 #define MMAP_SDRAMC (CONFIG_SYS_MBAR + 0x00000040) 30 #define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00000080) 31 #define MMAP_DMA0 (CONFIG_SYS_MBAR + 0x00000100) 32 #define MMAP_DMA1 (CONFIG_SYS_MBAR + 0x00000140) 33 #define MMAP_DMA2 (CONFIG_SYS_MBAR + 0x00000180) 34 #define MMAP_DMA3 (CONFIG_SYS_MBAR + 0x000001C0) 35 #define MMAP_UART0 (CONFIG_SYS_MBAR + 0x00000200) 36 #define MMAP_UART1 (CONFIG_SYS_MBAR + 0x00000240) 37 #define MMAP_UART2 (CONFIG_SYS_MBAR + 0x00000280) 38 #define MMAP_I2C (CONFIG_SYS_MBAR + 0x00000300) 39 #define MMAP_QSPI (CONFIG_SYS_MBAR + 0x00000340) 40 #define MMAP_DTMR0 (CONFIG_SYS_MBAR + 0x00000400) 41 #define MMAP_DTMR1 (CONFIG_SYS_MBAR + 0x00000440) 42 #define MMAP_DTMR2 (CONFIG_SYS_MBAR + 0x00000480) 43 #define MMAP_DTMR3 (CONFIG_SYS_MBAR + 0x000004C0) 44 #define MMAP_INTC0 (CONFIG_SYS_MBAR + 0x00000C00) 45 #define MMAP_INTC1 (CONFIG_SYS_MBAR + 0x00000D00) 46 #define MMAP_INTCACK (CONFIG_SYS_MBAR + 0x00000F00) 47 #define MMAP_FEC (CONFIG_SYS_MBAR + 0x00001000) 48 #define MMAP_FECFIFO (CONFIG_SYS_MBAR + 0x00001400) 49 #define MMAP_GPIO (CONFIG_SYS_MBAR + 0x00100000) 50 #define MMAP_CCM (CONFIG_SYS_MBAR + 0x00110000) 51 #define MMAP_PLL (CONFIG_SYS_MBAR + 0x00120000) 52 #define MMAP_EPORT (CONFIG_SYS_MBAR + 0x00130000) 53 #define MMAP_WDOG (CONFIG_SYS_MBAR + 0x00140000) 54 #define MMAP_PIT0 (CONFIG_SYS_MBAR + 0x00150000) 55 #define MMAP_PIT1 (CONFIG_SYS_MBAR + 0x00160000) 56 #define MMAP_PIT2 (CONFIG_SYS_MBAR + 0x00170000) 57 #define MMAP_PIT3 (CONFIG_SYS_MBAR + 0x00180000) 58 #define MMAP_QADC (CONFIG_SYS_MBAR + 0x00190000) 59 #define MMAP_GPTMRA (CONFIG_SYS_MBAR + 0x001A0000) 60 #define MMAP_GPTMRB (CONFIG_SYS_MBAR + 0x001B0000) 61 #define MMAP_CAN (CONFIG_SYS_MBAR + 0x001C0000) 62 #define MMAP_CFMC (CONFIG_SYS_MBAR + 0x001D0000) 63 #define MMAP_CFMMEM (CONFIG_SYS_MBAR + 0x04000000) 64 65 #include <asm/coldfire/eport.h> 66 #include <asm/coldfire/flexbus.h> 67 #include <asm/coldfire/flexcan.h> 68 #include <asm/coldfire/intctrl.h> 69 #include <asm/coldfire/qspi.h> 70 71 /* System Control Module */ 72 typedef struct scm_ctrl { 73 u32 ipsbar; 74 u32 res1; 75 u32 rambar; 76 u32 res2; 77 u8 crsr; 78 u8 cwcr; 79 u8 lpicr; 80 u8 cwsr; 81 u32 res3; 82 u8 mpark; 83 u8 res4[3]; 84 u8 pacr0; 85 u8 pacr1; 86 u8 pacr2; 87 u8 pacr3; 88 u8 pacr4; 89 u8 res5; 90 u8 pacr5; 91 u8 pacr6; 92 u8 pacr7; 93 u8 res6; 94 u8 pacr8; 95 u8 res7; 96 u8 gpacr0; 97 u8 gpacr1; 98 u16 res8; 99 } scm_t; 100 101 typedef struct canex_ctrl { 102 can_msg_t msg[16]; /* 0x00 Message Buffer 0-15 */ 103 } canex_t; 104 105 /* Clock Module registers */ 106 typedef struct pll_ctrl { 107 u16 syncr; /* 0x00 synthesizer control register */ 108 u16 synsr; /* 0x02 synthesizer status register */ 109 } pll_t; 110 111 /* Watchdog registers */ 112 typedef struct wdog_ctrl { 113 ushort wcr; 114 ushort wmr; 115 ushort wcntr; 116 ushort wsr; 117 } wdog_t; 118 119 #endif /* __IMMAP_5282__ */ 120