1 /* 2 * Message Digest Hardware Accelerator Memory Map 3 * 4 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. 5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #ifndef __MDHA_H__ 27 #define __MDHA_H__ 28 29 /* Message Digest Hardware Accelerator */ 30 typedef struct mdha_ctrl { 31 u32 mr; /* 0x00 MDHA Mode */ 32 u32 cr; /* 0x04 Control */ 33 u32 cmd; /* 0x08 Command */ 34 u32 sr; /* 0x0C Status */ 35 u32 isr; /* 0x10 Interrupt Status */ 36 u32 imr; /* 0x14 Interrupt Mask */ 37 u32 dsz; /* 0x1C Data Size */ 38 u32 inp; /* 0x20 Input FIFO */ 39 u32 res1[3]; /* 0x24 - 0x2F */ 40 u32 mda0; /* 0x30 Message Digest AO */ 41 u32 mdb0; /* 0x34 Message Digest BO */ 42 u32 mdc0; /* 0x38 Message Digest CO */ 43 u32 mdd0; /* 0x3C Message Digest DO */ 44 u32 mde0; /* 0x40 Message Digest EO */ 45 u32 mdsz; /* 0x44 Message Data Size */ 46 u32 res[10]; /* 0x48 - 0x6F */ 47 u32 mda1; /* 0x70 Message Digest A1 */ 48 u32 mdb1; /* 0x74 Message Digest B1 */ 49 u32 mdc1; /* 0x78 Message Digest C1 */ 50 u32 mdd1; /* 0x7C Message Digest D1 */ 51 u32 mde1; /* 0x80 Message Digest E1 */ 52 } mdha_t; 53 54 #define MDHA_MR_SSL (0x00000400) 55 #define MDHA_MR_MACFUL (0x00000200) 56 #define MDHA_MR_SWAP (0x00000100) 57 #define MDHA_MR_OPAD (0x00000080) 58 #define MDHA_MR_IPAD (0x00000040) 59 #define MDHA_MR_INIT (0x00000020) 60 #define MDHA_MR_MAC(x) (((x) & 0x03) << 3) 61 #define MDHA_MR_MAC_MASK (0xFFFFFFE7) 62 #define MDHA_MR_MAC_EHMAC (0x00000010) 63 #define MDHA_MR_MAC_HMAC (0x00000008) 64 #define MDHA_MR_MAC_NONE (0x00000000) 65 #define MDHA_MR_PDATA (0x00000004) 66 #define MDHA_MR_ALG (0x00000001) 67 68 #define MDHA_CR_DMAL(x) (((x) & 0x1F) << 16) /* 532x */ 69 #define MDHA_CR_DMAL_MASK (0xFFE0FFFF) /* 532x */ 70 #define MDHA_CR_END (0x00000004) /* 532x */ 71 #define MDHA_CR_DMA (0x00000002) /* 532x */ 72 #define MDHA_CR_IE (0x00000001) 73 74 #define MDHA_CMD_GO (0x00000008) 75 #define MDHA_CMD_CI (0x00000004) 76 #define MDHA_CMD_RI (0x00000001) 77 #define MDHA_CMD_SWR (0x00000001) 78 79 #define MDHA_SR_IFL(x) (((x) & 0xFF) << 16) 80 #define MDHA_SR_IFL_MASK (0xFF00FFFF) 81 #define MDHA_SR_APD(x) (((x) & 0x7) << 13) 82 #define MDHA_SR_APD_MASK (0xFFFF1FFF) 83 #define MDHA_SR_FS(x) (((x) & 0x7) << 8) 84 #define MDHA_SR_FS_MASK (0xFFFFF8FF) 85 #define MDHA_SR_GNW (0x00000080) 86 #define MDHA_SR_HSH (0x00000040) 87 #define MDHA_SR_BUSY (0x00000010) 88 #define MDHA_SR_RD (0x00000008) 89 #define MDHA_SR_ERR (0x00000004) 90 #define MDHA_SR_DONE (0x00000002) 91 #define MDHA_SR_INT (0x00000001) 92 93 #define MDHA_ISR_DRL (0x00000400) /* 532x */ 94 #define MDHA_ISR_GTDS (0x00000200) 95 #define MDHA_ISR_ERE (0x00000100) 96 #define MDHA_ISR_RMDP (0x00000080) 97 #define MDHA_ISR_DSE (0x00000020) 98 #define MDHA_ISR_IME (0x00000010) 99 #define MDHA_ISR_NEIF (0x00000004) 100 #define MDHA_ISR_IFO (0x00000001) 101 102 #endif /* __MDHA_H__ */ 103