1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * LCD controller Memory Map 4 * 5 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. 6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 7 */ 8 9 #ifndef __LCDC_H__ 10 #define __LCDC_H__ 11 12 /* LCD module registers */ 13 typedef struct lcd_ctrl { 14 u32 ssar; /* 0x00 Screen Start Address Register */ 15 u32 sr; /* 0x04 LCD Size Register */ 16 u32 vpw; /* 0x08 Virtual Page Width Register */ 17 u32 cpr; /* 0x0C Cursor Position Register */ 18 u32 cwhb; /* 0x10 Cursor Width Height and Blink Register */ 19 u32 ccmr; /* 0x14 Color Cursor Mapping Register */ 20 u32 pcr; /* 0x18 Panel Configuration Register */ 21 u32 hcr; /* 0x1C Horizontal Configuration Register */ 22 u32 vcr; /* 0x20 Vertical Configuration Register */ 23 u32 por; /* 0x24 Panning Offset Register */ 24 u32 scr; /* 0x28 Sharp Configuration Register */ 25 u32 pccr; /* 0x2C PWM Contrast Control Register */ 26 u32 dcr; /* 0x30 DMA Control Register */ 27 u32 rmcr; /* 0x34 Refresh Mode Control Register */ 28 u32 icr; /* 0x38 Refresh Mode Control Register */ 29 u32 ier; /* 0x3C Interrupt Enable Register */ 30 u32 isr; /* 0x40 Interrupt Status Register */ 31 u32 res[4]; 32 u32 gwsar; /* 0x50 Graphic Window Start Address Register */ 33 u32 gwsr; /* 0x54 Graphic Window Size Register */ 34 u32 gwvpw; /* 0x58 Graphic Window Virtual Page Width Register */ 35 u32 gwpor; /* 0x5C Graphic Window Panning Offset Register */ 36 u32 gwpr; /* 0x60 Graphic Window Position Register */ 37 u32 gwcr; /* 0x64 Graphic Window Control Register */ 38 u32 gwdcr; /* 0x68 Graphic Window DMA Control Register */ 39 } lcd_t; 40 41 typedef struct lcdbg_ctrl { 42 u32 bglut[255]; 43 } lcdbg_t; 44 45 typedef struct lcdgw_ctrl { 46 u32 gwlut[255]; 47 } lcdgw_t; 48 49 /* Bit definitions and macros for LCDC_LSSAR */ 50 #define LCDC_SSAR_SSA(x) (((x)&0x3FFFFFFF)<<2) 51 52 /* Bit definitions and macros for LCDC_LSR */ 53 #define LCDC_SR_XMAX(x) (((x)&0x0000003F)<<20) 54 #define LCDC_SR_YMAX(x) ((x)&0x000003FF) 55 56 /* Bit definitions and macros for LCDC_LVPWR */ 57 #define LCDC_VPWR_VPW(x) (((x)&0x000003FF) 58 59 /* Bit definitions and macros for LCDC_LCPR */ 60 #define LCDC_CPR_CC(x) (((x)&0x00000003)<<30) 61 #define LCDC_CPR_CC_AND (0xC0000000) 62 #define LCDC_CPR_CC_XOR (0x80000000) 63 #define LCDC_CPR_CC_OR (0x40000000) 64 #define LCDC_CPR_CC_TRANSPARENT (0x00000000) 65 #define LCDC_CPR_OP (0x10000000) 66 #define LCDC_CPR_CXP(x) (((x)&0x000003FF)<<16) 67 #define LCDC_CPR_CYP(x) ((x)&0x000003FF) 68 69 /* Bit definitions and macros for LCDC_LCWHBR */ 70 #define LCDC_CWHBR_BK_EN (0x80000000) 71 #define LCDC_CWHBR_CW(x) (((x)&0x0000001F)<<24) 72 #define LCDC_CWHBR_CH(x) (((x)&0x0000001F)<<16) 73 #define LCDC_CWHBR_BD(x) ((x)&0x000000FF) 74 75 /* Bit definitions and macros for LCDC_LCCMR */ 76 #define LCDC_CCMR_CUR_COL_R(x) (((x)&0x0000003F)<<12) 77 #define LCDC_CCMR_CUR_COL_G(x) (((x)&0x0000003F)<<6) 78 #define LCDC_CCMR_CUR_COL_B(x) ((x)&0x0000003F) 79 80 /* Bit definitions and macros for LCDC_LPCR */ 81 #define LCDC_PCR_PANEL_TYPE(x) (((x)&0x00000003)<<30) 82 #define LCDC_PCR_MODE_TFT (0xC0000000) 83 #define LCDC_PCR_MODE_CSTN (0x40000000) 84 #define LCDC_PCR_MODE_MONOCHROME (0x00000000) 85 #define LCDC_PCR_TFT (0x80000000) 86 #define LCDC_PCR_COLOR (0x40000000) 87 #define LCDC_PCR_PBSIZ(x) (((x)&0x00000003)<<28) 88 #define LCDC_PCR_PBSIZ_8 (0x30000000) 89 #define LCDC_PCR_PBSIZ_4 (0x20000000) 90 #define LCDC_PCR_PBSIZ_2 (0x10000000) 91 #define LCDC_PCR_PBSIZ_1 (0x00000000) 92 #define LCDC_PCR_BPIX(x) (((x)&0x00000007)<<25) 93 #define LCDC_PCR_BPIX_18bpp (0x0C000000) 94 #define LCDC_PCR_BPIX_16bpp (0x0A000000) 95 #define LCDC_PCR_BPIX_12bpp (0x08000000) 96 #define LCDC_PCR_BPIX_8bpp (0x06000000) 97 #define LCDC_PCR_BPIX_4bpp (0x04000000) 98 #define LCDC_PCR_BPIX_2bpp (0x02000000) 99 #define LCDC_PCR_BPIX_1bpp (0x00000000) 100 #define LCDC_PCR_PIXPOL (0x01000000) 101 #define LCDC_PCR_FLM (0x00800000) 102 #define LCDC_PCR_LPPOL (0x00400000) 103 #define LCDC_PCR_CLKPOL (0x00200000) 104 #define LCDC_PCR_OEPOL (0x00100000) 105 #define LCDC_PCR_SCLKIDLE (0x00080000) 106 #define LCDC_PCR_ENDSEL (0x00040000) 107 #define LCDC_PCR_SWAP_SEL (0x00020000) 108 #define LCDC_PCR_REV_VS (0x00010000) 109 #define LCDC_PCR_ACDSEL (0x00008000) 110 #define LCDC_PCR_ACD(x) (((x)&0x0000007F)<<8) 111 #define LCDC_PCR_SCLKSEL (0x00000080) 112 #define LCDC_PCR_SHARP (0x00000040) 113 #define LCDC_PCR_PCD(x) ((x)&0x0000003F) 114 115 /* Bit definitions and macros for LCDC_LHCR */ 116 #define LCDC_HCR_H_WIDTH(x) (((x)&0x0000003F)<<26) 117 #define LCDC_HCR_H_WAIT_1(x) (((x)&0x000000FF)<<8) 118 #define LCDC_HCR_H_WAIT_2(x) ((x)&0x000000FF) 119 120 /* Bit definitions and macros for LCDC_LVCR */ 121 #define LCDC_VCR_V_WIDTH(x) (((x)&0x0000003F)<<26) 122 #define LCDC_VCR_V_WAIT_1(x) (((x)&0x000000FF)<<8) 123 #define LCDC_VCR_V_WAIT_2(x) ((x)&0x000000FF) 124 125 /* Bit definitions and macros for LCDC_SCR */ 126 #define LCDC_SCR_PS_R_DELAY(x) (((x)&0x0000003F) << 26) 127 #define LCDC_SCR_CLS_R_DELAY(x) (((x)&0x000000FF) << 16) 128 #define LCDC_SCR_RTG_DELAY(x) (((x)&0x0000000F) << 8) 129 #define LCDC_SCR_GRAY2(x) (((x)&0x0000000F) << 4) 130 #define LCDC_SCR_GRAY1(x) ((x)&&0x0000000F) 131 132 /* Bit definitions and macros for LCDC_LPCCR */ 133 #define LCDC_PCCR_CLS_HI_WID(x) (((x)&0x000001FF)<<16) 134 #define LCDC_PCCR_LDMSK (0x00008000) 135 #define LCDC_PCCR_SCR(x) (((x)&0x00000003)<<9) 136 #define LCDC_PCCR_SCR_LCDCLK (0x00000400) 137 #define LCDC_PCCR_SCR_PIXCLK (0x00000200) 138 #define LCDC_PCCR_SCR_LNPULSE (0x00000000) 139 #define LCDC_PCCR_CC_EN (0x00000100) 140 #define LCDC_PCCR_PW(x) ((x)&0x000000FF) 141 142 /* Bit definitions and macros for LCDC_LDCR */ 143 #define LCDC_DCR_BURST (0x80000000) 144 #define LCDC_DCR_HM(x) (((x)&0x0000001F)<<16) 145 #define LCDC_DCR_TM(x) ((x)&0x0000001F) 146 147 /* Bit definitions and macros for LCDC_LRMCR */ 148 #define LCDC_RMCR_SEL_REF (0x00000001) 149 150 /* Bit definitions and macros for LCDC_LICR */ 151 #define LCDC_ICR_GW_INT_CON (0x00000010) 152 #define LCDC_ICR_INTSYN (0x00000004) 153 #define LCDC_ICR_INTCON (0x00000001) 154 155 /* Bit definitions and macros for LCDC_LIER */ 156 #define LCDC_IER_GW_UDR (0x00000080) 157 #define LCDC_IER_GW_ERR (0x00000040) 158 #define LCDC_IER_GW_EOF (0x00000020) 159 #define LCDC_IER_GW_BOF (0x00000010) 160 #define LCDC_IER_UDR (0x00000008) 161 #define LCDC_IER_ERR (0x00000004) 162 #define LCDC_IER_EOF (0x00000002) 163 #define LCDC_IER_BOF (0x00000001) 164 165 /* Bit definitions and macros for LCDC_LGWSAR */ 166 #define LCDC_GWSAR_GWSA(x) (((x)&0x3FFFFFFF)<<2) 167 168 /* Bit definitions and macros for LCDC_LGWSR */ 169 #define LCDC_GWSR_GWW(x) (((x)&0x0000003F)<<20) 170 #define LCDC_GWSR_GWH(x) ((x)&0x000003FF) 171 172 /* Bit definitions and macros for LCDC_LGWVPWR */ 173 #define LCDC_GWVPWR_GWVPW(x) ((x)&0x000003FF) 174 175 /* Bit definitions and macros for LCDC_LGWPOR */ 176 #define LCDC_GWPOR_GWPO(x) ((x)&0x0000001F) 177 178 /* Bit definitions and macros for LCDC_LGWPR */ 179 #define LCDC_GWPR_GWXP(x) (((x)&0x000003FF)<<16) 180 #define LCDC_GWPR_GWYP(x) ((x)&0x000003FF) 181 182 /* Bit definitions and macros for LCDC_LGWCR */ 183 #define LCDC_GWCR_GWAV(x) (((x)&0x000000FF)<<24) 184 #define LCDC_GWCR_GWCKE (0x00800000) 185 #define LCDC_LGWCR_GWE (0x00400000) 186 #define LCDC_LGWCR_GW_RVS (0x00200000) 187 #define LCDC_LGWCR_GWCKR(x) (((x)&0x0000003F)<<12) 188 #define LCDC_LGWCR_GWCKG(x) (((x)&0x0000003F)<<6) 189 #define LCDC_LGWCR_GWCKB(x) ((x)&0x0000003F) 190 191 /* Bit definitions and macros for LCDC_LGWDCR */ 192 #define LCDC_LGWDCR_GWBT (0x80000000) 193 #define LCDC_LGWDCR_GWHM(x) (((x)&0x0000001F)<<16) 194 #define LCDC_LGWDCR_GWTM(x) ((x)&0x0000001F) 195 196 #endif /* __LCDC_H__ */ 197