1 /* 2 * 3 * (C) Copyright 2000-2003 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. 7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 8 * 9 * See file CREDITS for list of people who contributed to this 10 * project. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; either version 2 of 15 * the License, or (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25 * MA 02111-1307 USA 26 */ 27 28 #include <common.h> 29 #include <watchdog.h> 30 #include <command.h> 31 #include <netdev.h> 32 33 #include <asm/immap.h> 34 #include <asm/io.h> 35 36 DECLARE_GLOBAL_DATA_PTR; 37 38 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 39 { 40 gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR); 41 42 out_be16(&gptmr->pre, 10); 43 out_be16(&gptmr->cnt, 1); 44 45 /* enable watchdog, set timeout to 0 and wait */ 46 out_8(&gptmr->mode, GPT_TMS_SGPIO); 47 out_8(&gptmr->ctrl, GPT_CTRL_WDEN | GPT_CTRL_CE); 48 49 /* we don't return! */ 50 return 1; 51 }; 52 53 int checkcpu(void) 54 { 55 siu_t *siu = (siu_t *) MMAP_SIU; 56 u16 id = 0; 57 58 puts("CPU: "); 59 60 switch ((in_be32(&siu->jtagid) & 0x000FF000) >> 12) { 61 case 0x0C: 62 id = 5485; 63 break; 64 case 0x0D: 65 id = 5484; 66 break; 67 case 0x0E: 68 id = 5483; 69 break; 70 case 0x0F: 71 id = 5482; 72 break; 73 case 0x10: 74 id = 5481; 75 break; 76 case 0x11: 77 id = 5480; 78 break; 79 case 0x12: 80 id = 5475; 81 break; 82 case 0x13: 83 id = 5474; 84 break; 85 case 0x14: 86 id = 5473; 87 break; 88 case 0x15: 89 id = 5472; 90 break; 91 case 0x16: 92 id = 5471; 93 break; 94 case 0x17: 95 id = 5470; 96 break; 97 } 98 99 if (id) { 100 char buf1[32], buf2[32]; 101 102 printf("Freescale MCF%d\n", id); 103 printf(" CPU CLK %s MHz BUS CLK %s MHz\n", 104 strmhz(buf1, gd->cpu_clk), 105 strmhz(buf2, gd->bus_clk)); 106 } 107 108 return 0; 109 }; 110 111 #if defined(CONFIG_HW_WATCHDOG) 112 /* Called by macro WATCHDOG_RESET */ 113 void hw_watchdog_reset(void) 114 { 115 gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR); 116 117 out_8(&gptmr->ocpw, 0xa5); 118 } 119 120 int watchdog_disable(void) 121 { 122 gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR); 123 124 /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */ 125 out_8(&gptmr->mode, 0); 126 out_8(&gptmr->ctrl, 0); 127 128 puts("WATCHDOG:disabled\n"); 129 130 return (0); 131 } 132 133 int watchdog_init(void) 134 { 135 gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR); 136 137 out_be16(&gptmr->pre, CONFIG_WATCHDOG_TIMEOUT); 138 out_be16(&gptmr->cnt, CONFIG_SYS_TIMER_PRESCALER * 1000); 139 140 out_8(&gptmr->mode, GPT_TMS_SGPIO); 141 out_8(&gptmr->ctrl, GPT_CTRL_CE | GPT_CTRL_WDEN); 142 puts("WATCHDOG:enabled\n"); 143 144 return (0); 145 } 146 #endif /* CONFIG_HW_WATCHDOG */ 147 148 #if defined(CONFIG_FSLDMAFEC) || defined(CONFIG_MCFFEC) 149 /* Default initializations for MCFFEC controllers. To override, 150 * create a board-specific function called: 151 * int board_eth_init(bd_t *bis) 152 */ 153 154 int cpu_eth_init(bd_t *bis) 155 { 156 #if defined(CONFIG_FSLDMAFEC) 157 mcdmafec_initialize(bis); 158 #endif 159 #if defined(CONFIG_MCFFEC) 160 mcffec_initialize(bis); 161 #endif 162 return 0; 163 } 164 #endif 165