xref: /openbmc/u-boot/arch/m68k/cpu/mcf547x_8x/cpu.c (revision 15855700)
1 /*
2  *
3  * (C) Copyright 2000-2003
4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5  *
6  * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
7  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8  *
9  * See file CREDITS for list of people who contributed to this
10  * project.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; either version 2 of
15  * the License, or (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25  * MA 02111-1307 USA
26  */
27 
28 #include <common.h>
29 #include <watchdog.h>
30 #include <command.h>
31 #include <netdev.h>
32 
33 #include <asm/immap.h>
34 
35 DECLARE_GLOBAL_DATA_PTR;
36 
37 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
38 {
39 	volatile gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
40 
41 	gptmr->pre = 10;
42 	gptmr->cnt = 1;
43 
44 	/* enable watchdog, set timeout to 0 and wait */
45 	gptmr->mode = GPT_TMS_SGPIO;
46 	gptmr->ctrl = GPT_CTRL_WDEN | GPT_CTRL_CE;
47 
48 	/* we don't return! */
49 	return 1;
50 };
51 
52 int checkcpu(void)
53 {
54 	volatile siu_t *siu = (siu_t *) MMAP_SIU;
55 	u16 id = 0;
56 
57 	puts("CPU:   ");
58 
59 	switch ((siu->jtagid & 0x000FF000) >> 12) {
60 	case 0x0C:
61 		id = 5485;
62 		break;
63 	case 0x0D:
64 		id = 5484;
65 		break;
66 	case 0x0E:
67 		id = 5483;
68 		break;
69 	case 0x0F:
70 		id = 5482;
71 		break;
72 	case 0x10:
73 		id = 5481;
74 		break;
75 	case 0x11:
76 		id = 5480;
77 		break;
78 	case 0x12:
79 		id = 5475;
80 		break;
81 	case 0x13:
82 		id = 5474;
83 		break;
84 	case 0x14:
85 		id = 5473;
86 		break;
87 	case 0x15:
88 		id = 5472;
89 		break;
90 	case 0x16:
91 		id = 5471;
92 		break;
93 	case 0x17:
94 		id = 5470;
95 		break;
96 	}
97 
98 	if (id) {
99 		char buf1[32], buf2[32];
100 
101 		printf("Freescale MCF%d\n", id);
102 		printf("       CPU CLK %s MHz BUS CLK %s MHz\n",
103 		       strmhz(buf1, gd->cpu_clk),
104 		       strmhz(buf2, gd->bus_clk));
105 	}
106 
107 	return 0;
108 };
109 
110 #if defined(CONFIG_HW_WATCHDOG)
111 /* Called by macro WATCHDOG_RESET */
112 void hw_watchdog_reset(void)
113 {
114 	volatile gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
115 
116 	gptmr->ocpw = 0xa5;
117 }
118 
119 int watchdog_disable(void)
120 {
121 	volatile gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
122 
123 	/* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
124 	gptmr->mode = 0;
125 	gptmr->ctrl = 0;
126 
127 	puts("WATCHDOG:disabled\n");
128 
129 	return (0);
130 }
131 
132 int watchdog_init(void)
133 {
134 
135 	volatile gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
136 
137 	gptmr->pre = CONFIG_WATCHDOG_TIMEOUT;
138 	gptmr->cnt = CONFIG_SYS_TIMER_PRESCALER * 1000;
139 
140 	gptmr->mode = GPT_TMS_SGPIO;
141 	gptmr->ctrl = GPT_CTRL_CE | GPT_CTRL_WDEN;
142 	puts("WATCHDOG:enabled\n");
143 
144 	return (0);
145 }
146 #endif				/* CONFIG_HW_WATCHDOG */
147 
148 #if defined(CONFIG_FSLDMAFEC) || defined(CONFIG_MCFFEC)
149 /* Default initializations for MCFFEC controllers.  To override,
150  * create a board-specific function called:
151  * 	int board_eth_init(bd_t *bis)
152  */
153 
154 int cpu_eth_init(bd_t *bis)
155 {
156 #if defined(CONFIG_FSLDMAFEC)
157 	mcdmafec_initialize(bis);
158 #endif
159 #if defined(CONFIG_MCFFEC)
160 	mcffec_initialize(bis);
161 #endif
162 	return 0;
163 }
164 #endif
165