1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2a4145534SPeter Tyser /*
3a4145534SPeter Tyser  *
4c6d88630SAlison Wang  * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
5a4145534SPeter Tyser  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6a4145534SPeter Tyser  */
7a4145534SPeter Tyser 
8a4145534SPeter Tyser /* CPU specific interrupt routine */
9a4145534SPeter Tyser #include <common.h>
10a4145534SPeter Tyser #include <asm/immap.h>
11c6d88630SAlison Wang #include <asm/io.h>
12a4145534SPeter Tyser 
13a4145534SPeter Tyser int interrupt_init(void)
14a4145534SPeter Tyser {
15c6d88630SAlison Wang 	int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
16a4145534SPeter Tyser 
17a4145534SPeter Tyser 	/* Make sure all interrupts are disabled */
18c6d88630SAlison Wang 	setbits_be32(&intp->imrl0, 0x1);
19a4145534SPeter Tyser 
20a4145534SPeter Tyser 	enable_interrupts();
21a4145534SPeter Tyser 	return 0;
22a4145534SPeter Tyser }
23a4145534SPeter Tyser 
24a4145534SPeter Tyser #if defined(CONFIG_MCFTMR)
25a4145534SPeter Tyser void dtimer_intr_setup(void)
26a4145534SPeter Tyser {
27c6d88630SAlison Wang 	int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
28a4145534SPeter Tyser 
29c6d88630SAlison Wang 	out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
30c6d88630SAlison Wang 	clrbits_be32(&intp->imrl0, INTC_IPRL_INT0);
31c6d88630SAlison Wang 	clrbits_be32(&intp->imrl0, CONFIG_SYS_TMRINTR_MASK);
32a4145534SPeter Tyser }
33a4145534SPeter Tyser #endif
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