1 /* 2 * 3 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. 4 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #include <common.h> 26 #include <asm/processor.h> 27 28 #include <asm/immap.h> 29 #include <asm/io.h> 30 31 DECLARE_GLOBAL_DATA_PTR; 32 33 /* 34 * Low Power Divider specifications 35 */ 36 #define CLOCK_LPD_MIN (1 << 0) /* Divider (decoded) */ 37 #define CLOCK_LPD_MAX (1 << 15) /* Divider (decoded) */ 38 39 #define CLOCK_PLL_FVCO_MAX 540000000 40 #define CLOCK_PLL_FVCO_MIN 300000000 41 42 #define CLOCK_PLL_FSYS_MAX 266666666 43 #define CLOCK_PLL_FSYS_MIN 100000000 44 #define MHZ 1000000 45 46 void clock_enter_limp(int lpdiv) 47 { 48 ccm_t *ccm = (ccm_t *)MMAP_CCM; 49 int i, j; 50 51 /* Check bounds of divider */ 52 if (lpdiv < CLOCK_LPD_MIN) 53 lpdiv = CLOCK_LPD_MIN; 54 if (lpdiv > CLOCK_LPD_MAX) 55 lpdiv = CLOCK_LPD_MAX; 56 57 /* Round divider down to nearest power of two */ 58 for (i = 0, j = lpdiv; j != 1; j >>= 1, i++) ; 59 60 /* Apply the divider to the system clock */ 61 clrsetbits_be16(&ccm->cdr, 0x0f00, CCM_CDR_LPDIV(i)); 62 63 /* Enable Limp Mode */ 64 setbits_be16(&ccm->misccr, CCM_MISCCR_LIMP); 65 } 66 67 /* 68 * brief Exit Limp mode 69 * warning The PLL should be set and locked prior to exiting Limp mode 70 */ 71 void clock_exit_limp(void) 72 { 73 ccm_t *ccm = (ccm_t *)MMAP_CCM; 74 pll_t *pll = (pll_t *)MMAP_PLL; 75 76 /* Exit Limp mode */ 77 clrbits_be16(&ccm->misccr, CCM_MISCCR_LIMP); 78 79 /* Wait for the PLL to lock */ 80 while (!(in_be32(&pll->psr) & PLL_PSR_LOCK)) 81 ; 82 } 83 84 /* 85 * get_clocks() fills in gd->cpu_clock and gd->bus_clk 86 */ 87 int get_clocks(void) 88 { 89 90 ccm_t *ccm = (ccm_t *)MMAP_CCM; 91 pll_t *pll = (pll_t *)MMAP_PLL; 92 int vco, temp, pcrvalue, pfdr; 93 u8 bootmode; 94 95 pcrvalue = in_be32(&pll->pcr) & 0xFF0F0FFF; 96 pfdr = pcrvalue >> 24; 97 98 if (pfdr == 0x1E) 99 bootmode = 0; /* Normal Mode */ 100 101 #ifdef CONFIG_CF_SBF 102 bootmode = 3; /* Serial Mode */ 103 #endif 104 105 if (bootmode == 0) { 106 /* Normal mode */ 107 vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC; 108 if ((vco < CLOCK_PLL_FVCO_MIN) || (vco > CLOCK_PLL_FVCO_MAX)) { 109 /* Default value */ 110 pcrvalue = (in_be32(&pll->pcr) & 0x00FFFFFF); 111 pcrvalue |= 0x1E << 24; 112 out_be32(&pll->pcr, pcrvalue); 113 vco = 114 ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * 115 CONFIG_SYS_INPUT_CLKSRC; 116 } 117 gd->vco_clk = vco; /* Vco clock */ 118 } else if (bootmode == 3) { 119 /* serial mode */ 120 vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC; 121 gd->vco_clk = vco; /* Vco clock */ 122 } 123 124 if ((in_be16(&ccm->ccr) & CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) { 125 /* Limp mode */ 126 } else { 127 gd->inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */ 128 129 temp = (in_be32(&pll->pcr) & PLL_PCR_OUTDIV1_MASK) + 1; 130 gd->cpu_clk = vco / temp; /* cpu clock */ 131 132 temp = ((in_be32(&pll->pcr) & PLL_PCR_OUTDIV2_MASK) >> 4) + 1; 133 gd->flb_clk = vco / temp; /* flexbus clock */ 134 gd->bus_clk = gd->flb_clk; 135 } 136 137 #ifdef CONFIG_FSL_I2C 138 gd->i2c1_clk = gd->bus_clk; 139 #endif 140 141 return (0); 142 } 143