xref: /openbmc/u-boot/arch/arm/mach-zynqmp/Kconfig (revision 8dee7b96)
1if ARCH_ZYNQMP
2
3config SPL_FS_FAT
4	default y
5
6config SPL_LIBCOMMON_SUPPORT
7	default y
8
9config SPL_LIBDISK_SUPPORT
10	default y
11
12config SPL_LIBGENERIC_SUPPORT
13	default y
14
15config SPL_MMC_SUPPORT
16	default y if MMC_SDHCI_ZYNQ
17
18config SPL_SERIAL_SUPPORT
19	default y
20
21config SPL_SPI_FLASH_SUPPORT
22	default y if ZYNQ_QSPI
23
24config SPL_SPI_SUPPORT
25	default y if ZYNQ_QSPI
26
27config SYS_BOARD
28	default "zynqmp"
29
30config SYS_VENDOR
31	string "Vendor name"
32	default "xilinx"
33
34config SYS_SOC
35	default "zynqmp"
36
37config SYS_CONFIG_NAME
38	string "Board configuration name"
39	default "xilinx_zynqmp"
40	help
41	  This option contains information about board configuration name.
42	  Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
43	  will be used for board configuration.
44
45config SYS_MEM_RSVD_FOR_MMU
46	bool "Reserve memory for MMU Table"
47	help
48	  If defined this option is used to setup different space for
49	  MMU table than the one which will be allocated during
50	  relocation.
51
52config BOOT_INIT_FILE
53	string "boot.bin init register filename"
54	depends on SPL
55	default ""
56	help
57	  Add register writes to boot.bin format (max 256 pairs).
58	  Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
59
60config PMUFW_INIT_FILE
61	string "PMU firmware"
62	depends on SPL
63	default ""
64	help
65	  Include external PMUFW (Platform Management Unit FirmWare) to
66	  a Xilinx bootable image (boot.bin).
67
68config ZYNQMP_USB
69	bool "Configure ZynqMP USB"
70
71config ZYNQMP_NO_DDR
72	bool "Disable DDR MMU mapping"
73	help
74	  This option configures MMU with no DDR to avoid speculative
75	  access to DDR memory where DDR is not present.
76
77config SYS_MALLOC_F_LEN
78	default 0x600
79
80config DEFINE_TCM_OCM_MMAP
81	bool "Define TCM and OCM memory in MMU Table"
82	default y if MP
83	help
84	  This option if enabled defines the TCM and OCM memory and its
85	  memory attributes in MMU table entry.
86
87config ZYNQMP_PSU_INIT_ENABLED
88	bool "Include psu_init"
89	help
90	  Include psu_init to full u-boot. SPL include psu_init by default.
91
92config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
93	bool "Overwrite SPL bootmode"
94	depends on SPL
95	help
96	  Overwrite bootmode selected via boot mode pins to tell SPL what should
97	  be the next boot device.
98
99config ZYNQ_SDHCI_MAX_FREQ
100	default 200000000
101
102config SPL_ZYNQMP_TWO_SDHCI
103	bool "Enable booting from both SDHCIs"
104	depends on SPL
105	help
106	  This option reflects that board has two SDHCI controllers which
107	  platform can use as boot device. This option ensures that SPL will
108	  setup BOOT_DEVICE_MMC2 for SDHCI1 controller and BOOT_DEVICE_MMC1 for
109	  SDHCI0 controller. Platforms which have only one SDHCI controller
110	  shouldn't enable this option because it for software SDHCI0 or SDHCI1
111	  are both covered by BOOT_DEVICE_MMC1.
112
113config SPL_ZYNQMP_ALT_BOOTMODE
114	hex
115	default 0x0 if JTAG_MODE
116	default 0x1 if QSPI_MODE_24BIT
117	default 0x2 if QSPI_MODE_32BIT
118	default 0x3 if SD_MODE
119	default 0x4 if NAND_MODE
120	default 0x5 if SD_MODE1
121	default 0x6 if EMMC_MODE
122	default 0x7 if USB_MODE
123	default 0xa if SW_USBHOST_MODE
124	default 0xb if SW_SATA_MODE
125	default 0xe if SD1_LSHFT_MODE
126
127choice
128	prompt "Boot mode"
129	depends on SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
130	default JTAG_MODE
131
132config JTAG_MODE
133	bool "JTAG_MODE"
134
135config QSPI_MODE_24BIT
136	bool "QSPI_MODE_24BIT"
137
138config QSPI_MODE_32BIT
139	bool "QSPI_MODE_32BIT"
140
141config SD_MODE
142	bool "SD_MODE"
143
144config SD_MODE1
145	bool "SD_MODE1"
146
147config NAND_MODE
148	bool "NAND_MODE"
149
150config EMMC_MODE
151	bool "EMMC_MODE"
152
153config USB_MODE
154	bool "USB"
155
156config SW_USBHOST_MODE
157	bool "SW USBHOST_MODE"
158
159config SW_SATA_MODE
160	bool "SW SATA_MODE"
161
162config SD1_LSHFT_MODE
163	bool "SD1_LSHFT_MODE"
164
165endchoice
166
167endif
168