1/* 2 * Copyright (c) 2004-2008 Texas Instruments 3 * 4 * (C) Copyright 2002 5 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") 11OUTPUT_ARCH(arm) 12ENTRY(_start) 13SECTIONS 14{ 15 . = 0x00000000; 16 17 . = ALIGN(4); 18 .text : 19 { 20 *(.__image_copy_start) 21 *(.vectors) 22 CPUDIR/start.o (.text*) 23 *(.text*) 24 } 25 26 . = ALIGN(4); 27 .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } 28 29 . = ALIGN(4); 30 .data : { 31 *(.data*) 32 } 33 34 . = ALIGN(4); 35 36 . = .; 37 38 . = ALIGN(4); 39 .u_boot_list : { 40 KEEP(*(SORT(.u_boot_list*))); 41 } 42 43 . = ALIGN(4); 44 45 .image_copy_end : 46 { 47 *(.__image_copy_end) 48 } 49 50 .rel_dyn_start : 51 { 52 *(.__rel_dyn_start) 53 } 54 55 .rel.dyn : { 56 *(.rel*) 57 } 58 59 .rel_dyn_end : 60 { 61 *(.__rel_dyn_end) 62 } 63 64 .end : 65 { 66 *(.__end) 67 } 68 69 _image_binary_end = .; 70 71/* 72 * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c 73 * __bss_base and __bss_limit are for linker only (overlay ordering) 74 */ 75 76 .bss_start __rel_dyn_start (OVERLAY) : { 77 KEEP(*(.__bss_start)); 78 __bss_base = .; 79 } 80 81 .bss __bss_base (OVERLAY) : { 82 *(.bss*) 83 . = ALIGN(4); 84 __bss_limit = .; 85 } 86 87 .bss_end __bss_limit (OVERLAY) : { 88 KEEP(*(.__bss_end)); 89 } 90 91 /* 92 * Zynq needs to discard these sections because the user 93 * is expected to pass this image on to tools for boot.bin 94 * generation that require them to be dropped. 95 */ 96 /DISCARD/ : { *(.dynsym) } 97 /DISCARD/ : { *(.dynbss*) } 98 /DISCARD/ : { *(.dynstr*) } 99 /DISCARD/ : { *(.dynamic*) } 100 /DISCARD/ : { *(.plt*) } 101 /DISCARD/ : { *(.interp*) } 102 /DISCARD/ : { *(.gnu*) } 103 /DISCARD/ : { *(.ARM.exidx*) } 104 /DISCARD/ : { *(.gnu.linkonce.armexidx.*) } 105} 106