1/*
2 * Copyright (c) 2014 Xilinx, Inc. Michal Simek
3 * Copyright (c) 2004-2008 Texas Instruments
4 *
5 * (C) Copyright 2002
6 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
7 *
8 * SPDX-License-Identifier:	GPL-2.0+
9 */
10
11MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
12		LENGTH = CONFIG_SPL_MAX_SIZE }
13MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
14		LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
15
16OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
17OUTPUT_ARCH(arm)
18ENTRY(_start)
19SECTIONS
20{
21	. = ALIGN(4);
22	.text :
23	{
24		__image_copy_start = .;
25		*(.vectors)
26		CPUDIR/start.o (.text*)
27		*(.text*)
28	} > .sram
29
30	. = ALIGN(4);
31	.rodata : {
32		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
33	} > .sram
34
35	. = ALIGN(4);
36	.data : {
37		*(.data*)
38	} > .sram
39
40	. = ALIGN(4);
41	.u_boot_list : {
42		KEEP(*(SORT(.u_boot_list*)));
43	} > .sram
44
45	. = ALIGN(4);
46
47	_image_binary_end = .;
48
49	_end = .;
50
51	/* Move BSS section to RAM because of FAT */
52	.bss (NOLOAD) : {
53		__bss_start = .;
54		*(.bss*)
55		 . = ALIGN(4);
56		__bss_end = .;
57	} > .sdram
58
59	/DISCARD/ : { *(.dynsym) }
60	/DISCARD/ : { *(.dynstr*) }
61	/DISCARD/ : { *(.dynamic*) }
62	/DISCARD/ : { *(.plt*) }
63	/DISCARD/ : { *(.interp*) }
64	/DISCARD/ : { *(.gnu*) }
65}
66