1 /* 2 * Copyright (C) 2012 Michal Simek <monstr@monstr.eu> 3 * Copyright (C) 2011-2012 Xilinx, Inc. All rights reserved. 4 * 5 * (C) Copyright 2008 6 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> 7 * 8 * (C) Copyright 2004 9 * Philippe Robin, ARM Ltd. <philippe.robin@arm.com> 10 * 11 * (C) Copyright 2002-2004 12 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> 13 * 14 * (C) Copyright 2003 15 * Texas Instruments <www.ti.com> 16 * 17 * (C) Copyright 2002 18 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 19 * Marius Groeger <mgroeger@sysgo.de> 20 * 21 * (C) Copyright 2002 22 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 23 * Alex Zuepke <azu@sysgo.de> 24 * 25 * SPDX-License-Identifier: GPL-2.0+ 26 */ 27 28 #include <common.h> 29 #include <div64.h> 30 #include <asm/io.h> 31 #include <asm/arch/hardware.h> 32 #include <asm/arch/clk.h> 33 34 DECLARE_GLOBAL_DATA_PTR; 35 36 struct scu_timer { 37 u32 load; /* Timer Load Register */ 38 u32 counter; /* Timer Counter Register */ 39 u32 control; /* Timer Control Register */ 40 }; 41 42 static struct scu_timer *timer_base = 43 (struct scu_timer *)ZYNQ_SCUTIMER_BASEADDR; 44 45 #define SCUTIMER_CONTROL_PRESCALER_MASK 0x0000FF00 /* Prescaler */ 46 #define SCUTIMER_CONTROL_PRESCALER_SHIFT 8 47 #define SCUTIMER_CONTROL_AUTO_RELOAD_MASK 0x00000002 /* Auto-reload */ 48 #define SCUTIMER_CONTROL_ENABLE_MASK 0x00000001 /* Timer enable */ 49 50 #define TIMER_LOAD_VAL 0xFFFFFFFF 51 #define TIMER_PRESCALE 255 52 53 int timer_init(void) 54 { 55 const u32 emask = SCUTIMER_CONTROL_AUTO_RELOAD_MASK | 56 (TIMER_PRESCALE << SCUTIMER_CONTROL_PRESCALER_SHIFT) | 57 SCUTIMER_CONTROL_ENABLE_MASK; 58 59 gd->arch.timer_rate_hz = (gd->cpu_clk / 2) / (TIMER_PRESCALE + 1); 60 61 /* Load the timer counter register */ 62 writel(0xFFFFFFFF, &timer_base->load); 63 64 /* 65 * Start the A9Timer device 66 * Enable Auto reload mode, Clear prescaler control bits 67 * Set prescaler value, Enable the decrementer 68 */ 69 clrsetbits_le32(&timer_base->control, SCUTIMER_CONTROL_PRESCALER_MASK, 70 emask); 71 72 /* Reset time */ 73 gd->arch.lastinc = readl(&timer_base->counter) / 74 (gd->arch.timer_rate_hz / CONFIG_SYS_HZ); 75 gd->arch.tbl = 0; 76 77 return 0; 78 } 79 80 /* 81 * This function is derived from PowerPC code (timebase clock frequency). 82 * On ARM it returns the number of timer ticks per second. 83 */ 84 ulong get_tbclk(void) 85 { 86 return gd->arch.timer_rate_hz; 87 } 88