1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2014 - 2017 Xilinx, Inc. Michal Simek 4 */ 5 #include <common.h> 6 #include <debug_uart.h> 7 #include <spl.h> 8 9 #include <asm/io.h> 10 #include <asm/spl.h> 11 #include <asm/arch/hardware.h> 12 #include <asm/arch/sys_proto.h> 13 #include <asm/arch/ps7_init_gpl.h> 14 15 void board_init_f(ulong dummy) 16 { 17 ps7_init(); 18 19 arch_cpu_init(); 20 21 #ifdef CONFIG_DEBUG_UART 22 /* Uart debug for sure */ 23 debug_uart_init(); 24 puts("Debug uart enabled\n"); /* or printch() */ 25 #endif 26 } 27 28 #ifdef CONFIG_SPL_BOARD_INIT 29 void spl_board_init(void) 30 { 31 preloader_console_init(); 32 board_init(); 33 } 34 #endif 35 36 u32 spl_boot_device(void) 37 { 38 u32 mode; 39 40 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) { 41 #ifdef CONFIG_SPL_SPI_SUPPORT 42 case ZYNQ_BM_QSPI: 43 puts("qspi boot\n"); 44 mode = BOOT_DEVICE_SPI; 45 break; 46 #endif 47 case ZYNQ_BM_NAND: 48 mode = BOOT_DEVICE_NAND; 49 break; 50 case ZYNQ_BM_NOR: 51 mode = BOOT_DEVICE_NOR; 52 break; 53 #ifdef CONFIG_SPL_MMC_SUPPORT 54 case ZYNQ_BM_SD: 55 puts("mmc boot\n"); 56 mode = BOOT_DEVICE_MMC1; 57 break; 58 #endif 59 case ZYNQ_BM_JTAG: 60 mode = BOOT_DEVICE_RAM; 61 break; 62 default: 63 puts("Unsupported boot mode selected\n"); 64 hang(); 65 } 66 67 return mode; 68 } 69 70 #ifdef CONFIG_SPL_OS_BOOT 71 int spl_start_uboot(void) 72 { 73 /* boot linux */ 74 return 0; 75 } 76 #endif 77 78 void spl_board_prepare_for_boot(void) 79 { 80 ps7_post_config(); 81 debug("SPL bye\n"); 82 } 83 84 #ifdef CONFIG_SPL_LOAD_FIT 85 int board_fit_config_name_match(const char *name) 86 { 87 /* Just empty function now - can't decide what to choose */ 88 debug("%s: %s\n", __func__, name); 89 90 return 0; 91 } 92 #endif 93