1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2014 - 2017 Xilinx, Inc. Michal Simek 4 */ 5 #include <common.h> 6 #include <debug_uart.h> 7 #include <spl.h> 8 9 #include <asm/io.h> 10 #include <asm/spl.h> 11 #include <asm/arch/hardware.h> 12 #include <asm/arch/sys_proto.h> 13 #include <asm/arch/ps7_init_gpl.h> 14 15 void board_init_f(ulong dummy) 16 { 17 ps7_init(); 18 19 arch_cpu_init(); 20 21 #ifdef CONFIG_DEBUG_UART 22 /* Uart debug for sure */ 23 debug_uart_init(); 24 puts("Debug uart enabled\n"); /* or printch() */ 25 #endif 26 } 27 28 #ifdef CONFIG_SPL_BOARD_INIT 29 void spl_board_init(void) 30 { 31 preloader_console_init(); 32 #if defined(CONFIG_ARCH_EARLY_INIT_R) && defined(CONFIG_SPL_FPGA_SUPPORT) 33 arch_early_init_r(); 34 #endif 35 board_init(); 36 } 37 #endif 38 39 u32 spl_boot_device(void) 40 { 41 u32 mode; 42 43 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) { 44 #ifdef CONFIG_SPL_SPI_SUPPORT 45 case ZYNQ_BM_QSPI: 46 puts("qspi boot\n"); 47 mode = BOOT_DEVICE_SPI; 48 break; 49 #endif 50 case ZYNQ_BM_NAND: 51 mode = BOOT_DEVICE_NAND; 52 break; 53 case ZYNQ_BM_NOR: 54 mode = BOOT_DEVICE_NOR; 55 break; 56 #ifdef CONFIG_SPL_MMC_SUPPORT 57 case ZYNQ_BM_SD: 58 puts("mmc boot\n"); 59 mode = BOOT_DEVICE_MMC1; 60 break; 61 #endif 62 case ZYNQ_BM_JTAG: 63 mode = BOOT_DEVICE_RAM; 64 break; 65 default: 66 puts("Unsupported boot mode selected\n"); 67 hang(); 68 } 69 70 return mode; 71 } 72 73 #ifdef CONFIG_SPL_OS_BOOT 74 int spl_start_uboot(void) 75 { 76 /* boot linux */ 77 return 0; 78 } 79 #endif 80 81 void spl_board_prepare_for_boot(void) 82 { 83 ps7_post_config(); 84 debug("SPL bye\n"); 85 } 86 87 #ifdef CONFIG_SPL_LOAD_FIT 88 int board_fit_config_name_match(const char *name) 89 { 90 /* Just empty function now - can't decide what to choose */ 91 debug("%s: %s\n", __func__, name); 92 93 return 0; 94 } 95 #endif 96