1 /* 2 * Copyright (C) 2012 - 2013 Michal Simek <monstr@monstr.eu> 3 * Copyright (C) 2012 - 2013 Xilinx, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <asm/io.h> 10 #include <asm/arch/sys_proto.h> 11 #include <asm/arch/hardware.h> 12 13 DECLARE_GLOBAL_DATA_PTR; 14 15 #ifndef CONFIG_ZYNQ_DDRC_INIT 16 void zynq_ddrc_init(void) {} 17 #else 18 /* Control regsiter bitfield definitions */ 19 #define ZYNQ_DDRC_CTRLREG_BUSWIDTH_MASK 0xC 20 #define ZYNQ_DDRC_CTRLREG_BUSWIDTH_SHIFT 2 21 #define ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT 1 22 23 /* ECC scrub regsiter definitions */ 24 #define ZYNQ_DDRC_ECC_SCRUBREG_ECC_MODE_MASK 0x7 25 #define ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED 0x4 26 27 void zynq_ddrc_init(void) 28 { 29 u32 width, ecctype; 30 31 width = readl(&ddrc_base->ddrc_ctrl); 32 width = (width & ZYNQ_DDRC_CTRLREG_BUSWIDTH_MASK) >> 33 ZYNQ_DDRC_CTRLREG_BUSWIDTH_SHIFT; 34 ecctype = (readl(&ddrc_base->ecc_scrub) & 35 ZYNQ_DDRC_ECC_SCRUBREG_ECC_MODE_MASK); 36 37 /* ECC is enabled when memory is in 16bit mode and it is enabled */ 38 if ((ecctype == ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED) && 39 (width == ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT)) { 40 puts("ECC enabled "); 41 /* 42 * Clear the first 1MB because it is not initialized from 43 * first stage bootloader. To get ECC to work all memory has 44 * been initialized by writing any value. 45 */ 46 /* cppcheck-suppress nullPointer */ 47 memset((void *)0, 0, 1 * 1024 * 1024); 48 } else { 49 puts("ECC disabled "); 50 } 51 } 52 #endif 53